From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lucas Stach Subject: Re: [RFC 1/5] clk: imx: imx8mq: Fix the rate propagation for arm pll Date: Thu, 14 Feb 2019 16:51:29 +0100 Message-ID: <1550159489.2546.41.camel@pengutronix.de> References: <1550084693-9797-1-git-send-email-abel.vesa@nxp.com> <1550084693-9797-2-git-send-email-abel.vesa@nxp.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <1550084693-9797-2-git-send-email-abel.vesa@nxp.com> Sender: linux-kernel-owner@vger.kernel.org To: Abel Vesa , Rob Herring , Stephen Boyd , Mark Rutland , Mike Turquette , Shawn Guo , Sascha Hauer , Angus Ainslie , Anson Huang Cc: dl-linux-imx , Linux Kernel Mailing List , "linux-arm-kernel@lists.infradead.org" , "linux-clk@vger.kernel.org" , "devicetree@vger.kernel.org" List-Id: devicetree@vger.kernel.org Am Mittwoch, den 13.02.2019, 19:05 +0000 schrieb Abel Vesa: > The arm pll bypass needs to propagate the rate upwards > in order for the cpufreq to work. > > Fixes: b80522040cd3f ("clk: imx: Add clock driver for i.MX8MQ CCM") > Signed-off-by: Abel Vesa Reviewed-by: Lucas Stach > --- >  drivers/clk/imx/clk-imx8mq.c | 2 +- >  1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c > index 398ab0b..57499ed 100644 > --- a/drivers/clk/imx/clk-imx8mq.c > +++ b/drivers/clk/imx/clk-imx8mq.c > @@ -340,7 +340,7 @@ static int imx8mq_clocks_probe(struct platform_device *pdev) >   clks[IMX8MQ_DRAM_PLL2_DIV] = imx_clk_divider("dram_pll2_div", "dram_pll2", base + 0x68, 1, 6); >   >   /* PLL bypass out */ > - clks[IMX8MQ_ARM_PLL_BYPASS] = imx_clk_mux("arm_pll_bypass", base + 0x28, 14, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels)); > + clks[IMX8MQ_ARM_PLL_BYPASS] = imx_clk_mux_flags("arm_pll_bypass", base + 0x28, 14, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels), CLK_SET_RATE_PARENT); >   clks[IMX8MQ_GPU_PLL_BYPASS] = imx_clk_mux("gpu_pll_bypass", base + 0x18, 14, 1, gpu_pll_bypass_sels, ARRAY_SIZE(gpu_pll_bypass_sels)); >   clks[IMX8MQ_VPU_PLL_BYPASS] = imx_clk_mux("vpu_pll_bypass", base + 0x20, 14, 1, vpu_pll_bypass_sels, ARRAY_SIZE(vpu_pll_bypass_sels)); >   clks[IMX8MQ_AUDIO_PLL1_BYPASS] = imx_clk_mux("audio_pll1_bypass", base + 0x0, 14, 1, audio_pll1_bypass_sels, ARRAY_SIZE(audio_pll1_bypass_sels));