From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: adrian.hunter@intel.com, ulf.hansson@linaro.org,
robh+dt@kernel.org, mark.rutland@arm.com, riteshh@codeaurora.org
Cc: thierry.reding@gmail.com, jonathanh@nvidia.com, anrao@nvidia.com,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
Sowjanya Komatineni <skomatineni@nvidia.com>
Subject: [PATCH V1 03/11] mmc: sdhci: add support for post tuning process
Date: Fri, 1 Mar 2019 21:20:17 -0800 [thread overview]
Message-ID: <1551504025-3541-3-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1551504025-3541-1-git-send-email-skomatineni@nvidia.com>
This patch adds support for post tuning process needed for some hosts
to perform after successful completion of HW tuning.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
drivers/mmc/host/sdhci.c | 6 +++++-
drivers/mmc/host/sdhci.h | 1 +
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index e9e919218006..976d4d1e2400 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -2392,8 +2392,12 @@ static int __sdhci_execute_tuning(struct sdhci_host *host, u32 opcode)
ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
if (!(ctrl & SDHCI_CTRL_EXEC_TUNING)) {
- if (ctrl & SDHCI_CTRL_TUNED_CLK)
+ if (ctrl & SDHCI_CTRL_TUNED_CLK) {
+ if (host->ops->post_tuning)
+ host->ops->post_tuning(host);
return 0; /* Success! */
+ }
+
break;
}
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index c80e0d6f9b10..236d67778645 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -639,6 +639,7 @@ struct sdhci_ops {
void (*reset)(struct sdhci_host *host, u8 mask);
int (*platform_execute_tuning)(struct sdhci_host *host, u32 opcode);
int (*get_max_tuning_loop_count)(struct sdhci_host *host);
+ void (*post_tuning)(struct sdhci_host *host);
void (*set_uhs_signaling)(struct sdhci_host *host, unsigned int uhs);
void (*hw_reset)(struct sdhci_host *host);
void (*adma_workaround)(struct sdhci_host *host, u32 intmask);
--
2.7.4
next prev parent reply other threads:[~2019-03-02 5:20 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-02 5:20 [PATCH V1 01/11] mmc: tegra: fix ddr signaling for non-ddr modes Sowjanya Komatineni
2019-03-02 5:20 ` [PATCH V1 02/11] mmc: sdhci: allow host to specify maximum tuning loops Sowjanya Komatineni
2019-03-08 11:50 ` Adrian Hunter
2019-03-02 5:20 ` Sowjanya Komatineni [this message]
2019-03-08 11:55 ` [PATCH V1 03/11] mmc: sdhci: add support for post tuning process Adrian Hunter
2019-03-02 5:20 ` [PATCH V1 04/11] mmc: tegra: update hw " Sowjanya Komatineni
2019-03-08 12:07 ` Adrian Hunter
2019-03-02 5:20 ` [PATCH V1 05/11] dt-bindings: mmc: tegra: document Tegra194 compatible string Sowjanya Komatineni
2019-03-02 5:20 ` [PATCH V1 06/11] arm64: tegra: fix default tap and trim values Sowjanya Komatineni
2019-03-02 5:20 ` [PATCH V1 07/11] mmc: cqhci: add quirk for setting DCMD CMD_TIMING Sowjanya Komatineni
2019-03-06 13:00 ` Adrian Hunter
2019-03-07 2:43 ` Ritesh Harjani
2019-03-07 18:16 ` Sowjanya Komatineni
2019-03-08 12:29 ` Adrian Hunter
2019-03-09 5:14 ` Sowjanya Komatineni
2019-03-13 2:31 ` Ritesh Harjani
2019-03-13 9:56 ` Hunter, Adrian
2019-03-13 15:47 ` Sowjanya Komatineni
2019-03-02 5:20 ` [PATCH V1 08/11] mmc: tegra: add Tegra186 WAR for CQE Sowjanya Komatineni
2019-03-02 5:20 ` [PATCH V1 09/11] mmc: cqhci: add CQHCI_SSC1 register CBC field mask Sowjanya Komatineni
2019-03-08 12:14 ` Adrian Hunter
2019-03-02 5:20 ` [PATCH V1 10/11] mmc: tegra: fix CQE resume sequence Sowjanya Komatineni
2019-03-08 12:59 ` Adrian Hunter
2019-03-02 5:20 ` [PATCH V1 11/11] arm64: tegra: enable command queue for tegra186 sdmmc4 Sowjanya Komatineni
2019-03-07 21:31 ` [PATCH V1 01/11] mmc: tegra: fix ddr signaling for non-ddr modes Jon Hunter
2019-03-08 11:44 ` Adrian Hunter
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