From mboxrd@z Thu Jan 1 00:00:00 1970 From: Henry Chen Subject: [RFC V2 11/11] arm64: dts: mt8183: Add interconnect provider DT nodes Date: Tue, 30 Apr 2019 16:51:05 +0800 Message-ID: <1556614265-12745-12-git-send-email-henryc.chen@mediatek.com> References: <1556614265-12745-1-git-send-email-henryc.chen@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1556614265-12745-1-git-send-email-henryc.chen@mediatek.com> Sender: linux-kernel-owner@vger.kernel.org To: Georgi Djakov , Rob Herring , Matthias Brugger , Viresh Kumar , Stephen Boyd Cc: Nicolas Boichat , Fan Chen , James Liao , Weiyi Lu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, Henry Chen List-Id: devicetree@vger.kernel.org Add DDR EMI provider dictating dram interconnect bus performance found on MT8183-based platforms Signed-off-by: Henry Chen --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index d298013..ab98adb 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include / { compatible = "mediatek,mt8183"; @@ -139,6 +140,10 @@ reg = <0 0x10012000 0 0x1000>; clocks = <&infracfg CLK_INFRA_DVFSRC>; clock-names = "dvfsrc"; + ddr_emi: interconnect { + compatible = "mediatek,mt8183-emi-icc"; + #interconnect-cells = <1>; + }; }; timer { -- 1.9.1