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From: Sameer Pujar <spujar@nvidia.com>
To: thierry.reding@gmail.com, jonathanh@nvidia.com,
	robh+dt@kernel.org, mark.rutland@arm.com
Cc: devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org, Sameer Pujar <spujar@nvidia.com>
Subject: [PATCH 1/2] arm64: tegra: add ACONNECT, ADMA and AGIC nodes
Date: Mon, 6 May 2019 17:28:27 +0530	[thread overview]
Message-ID: <1557143908-5850-1-git-send-email-spujar@nvidia.com> (raw)

Add DT nodes for following devices on Tegra186 and Tegra194
 * ACONNECT
 * ADMA
 * AGIC

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra186.dtsi | 67 ++++++++++++++++++++++++++++++++
 arch/arm64/boot/dts/nvidia/tegra194.dtsi | 67 ++++++++++++++++++++++++++++++++
 2 files changed, 134 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 6e2b6ce..2c432c9 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -1153,4 +1153,71 @@
 				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 		interrupt-parent = <&gic>;
 	};
+
+	aconnect@2a41000 {
+		compatible = "nvidia,tegra210-aconnect";
+		clocks = <&bpmp TEGRA186_CLK_APE>,
+			 <&bpmp TEGRA186_CLK_APB2APE>;
+		clock-names = "ape", "apb2ape";
+		power-domains = <&bpmp TEGRA186_POWER_DOMAIN_AUD>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		status = "disabled";
+
+		dma@2930000 {
+			compatible = "nvidia,tegra186-adma";
+			reg = <0x0 0x02930000 0x0 0x50000>;
+			interrupt-parent = <&agic>;
+			interrupts =  <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH 0>;
+			#dma-cells = <1>;
+			clocks = <&bpmp TEGRA186_CLK_AHUB>;
+			clock-names = "d_audio";
+			status = "disabled";
+		};
+
+		agic: agic@2a41000 {
+			compatible = "nvidia,tegra210-agic";
+			#interrupt-cells = <4>;
+			interrupt-controller;
+			reg = <0x0 0x02a41000 0x0 0x1000>,
+			      <0x0 0x02a42000 0x0 0x1000>;
+			interrupts = <GIC_SPI 145 (GIC_CPU_MASK_SIMPLE(4) |
+					IRQ_TYPE_LEVEL_HIGH)>;
+			clocks = <&bpmp TEGRA186_CLK_APE>;
+			clock-names = "clk";
+			status = "disabled";
+		};
+	};
 };
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index c77ca21..dcab504 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -1054,4 +1054,71 @@
 				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 		interrupt-parent = <&gic>;
 	};
+
+	aconnect@2a41000 {
+		compatible = "nvidia,tegra210-aconnect";
+		clocks = <&bpmp TEGRA194_CLK_APE>,
+			 <&bpmp TEGRA194_CLK_APB2APE>;
+		clock-names = "ape", "apb2ape";
+		power-domains = <&bpmp TEGRA194_POWER_DOMAIN_AUD>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		status = "disabled";
+
+		dma@2930000 {
+			compatible = "nvidia,tegra186-adma";
+			reg = <0x0 0x02930000 0x0 0x50000>;
+			interrupt-parent = <&agic>;
+			interrupts =  <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH 0>,
+				      <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH 0>;
+			#dma-cells = <1>;
+			clocks = <&bpmp TEGRA194_CLK_AHUB>;
+			clock-names = "d_audio";
+			status = "disabled";
+		};
+
+		agic: agic@2a41000 {
+			compatible = "nvidia,tegra210-agic";
+			#interrupt-cells = <4>;
+			interrupt-controller;
+			reg = <0x0 0x02a41000 0x0 0x1000>,
+			      <0x0 0x02a42000 0x0 0x1000>;
+			interrupts = <GIC_SPI 145 (GIC_CPU_MASK_SIMPLE(4) |
+					IRQ_TYPE_LEVEL_HIGH)>;
+			clocks = <&bpmp TEGRA194_CLK_APE>;
+			clock-names = "clk";
+			status = "disabled";
+		};
+	};
 };
-- 
2.7.4

             reply	other threads:[~2019-05-06 11:58 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-06 11:58 Sameer Pujar [this message]
2019-05-06 11:58 ` [PATCH 2/2] arm64: tegra: enable ACONNECT, ADMA and AGIC Sameer Pujar
2019-06-04  9:08   ` Jon Hunter
2019-06-04  9:07 ` [PATCH 1/2] arm64: tegra: add ACONNECT, ADMA and AGIC nodes Jon Hunter
2019-06-06  5:58   ` Sameer Pujar
2019-06-06  7:06     ` Jon Hunter

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