From: CK Hu <ck.hu@mediatek.com>
To: Jitao Shi <jitao.shi@mediatek.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, David Airlie <airlied@linux.ie>,
stonea168@163.com, dri-devel@lists.freedesktop.org,
yingjoe.chen@mediatek.com, Ajay Kumar <ajaykumar.rs@samsung.com>,
Vincent Palatin <vpalatin@chromium.org>,
cawa.cheng@mediatek.com,
Russell King <rmk+kernel@arm.linux.org.uk>,
Thierry Reding <treding@nvidia.com>,
linux-pwm@vger.kernel.org, Sascha Hauer <kernel@pengutronix.de>,
Pawel Moll <pawel.moll@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Rob Herring <robh+dt@kernel.org>,
linux-mediatek@lists.infradead.org,
Andy Yan <andy.yan@rock-chips.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
eddie.huang@mediatek.com, linux-arm-kernel@lists.infradead.org,
Rahul Sharma <rahul.sharma@samsung.com>,
srv_heupstream@mediatek.com, linux-kernel@vger.kernel.org,
Kumar Gala <galak@codeaurora.org>, Sean Paul <seanpaul@chromium>
Subject: Re: [v2 4/5] drm/mediatek: add frame size control
Date: Wed, 8 May 2019 10:59:14 +0800 [thread overview]
Message-ID: <1557284354.31731.9.camel@mtksdaap41> (raw)
In-Reply-To: <20190416060501.76276-5-jitao.shi@mediatek.com>
Hi, Jitao:
On Tue, 2019-04-16 at 14:05 +0800, Jitao Shi wrote:
> Our new DSI chip has frame size control.
> So add the driver data to control for different chips.
>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_dsi.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index be42405a0a78..458a700ce74c 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -78,6 +78,7 @@
> #define DSI_VBP_NL 0x24
> #define DSI_VFP_NL 0x28
> #define DSI_VACT_NL 0x2C
> +#define DSI_SIZE_CON 0x38
> #define DSI_HSA_WC 0x50
> #define DSI_HBP_WC 0x54
> #define DSI_HFP_WC 0x58
> @@ -162,6 +163,7 @@ struct phy;
> struct mtk_dsi_driver_data {
> const u32 reg_cmdq_off;
> bool has_shadow_ctl;
> + bool has_size_ctl;
> };
>
> struct mtk_dsi {
> @@ -430,6 +432,9 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi)
> writel(vm->vfront_porch, dsi->regs + DSI_VFP_NL);
> writel(vm->vactive, dsi->regs + DSI_VACT_NL);
>
> + if (dsi->driver_data->has_size_ctl)
> + writel(vm->vactive << 16 | vm->hactive, dsi->regs + DSI_SIZE_CON);
> +
> horizontal_sync_active_byte = (vm->hsync_len * dsi_tmp_buf_bpp - 10);
>
> if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)
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next prev parent reply other threads:[~2019-05-08 2:59 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-16 6:04 [v2 0/5] support dsi for mt8183 Jitao Shi
2019-04-16 6:04 ` [v2 1/5] drm/mediatek: move mipi_dsi_host_register to probe Jitao Shi
2019-05-07 9:52 ` CK Hu
2019-05-19 9:36 ` Jitao Shi
2019-05-20 7:06 ` CK Hu
2019-04-16 6:04 ` [v2 2/5] drm/mediatek: CMDQ reg address of mt8173 is different with mt2701 Jitao Shi
2019-04-17 4:58 ` kbuild test robot
2019-04-18 7:51 ` Nicolas Boichat
2019-05-08 2:39 ` CK Hu
2019-05-19 9:33 ` Jitao Shi
2019-05-20 8:34 ` CK Hu
2019-04-16 6:04 ` [v2 3/5] drm/mediatek: add dsi reg commit control Jitao Shi
2019-05-08 2:56 ` CK Hu
2019-04-16 6:05 ` [v2 4/5] drm/mediatek: add frame size control Jitao Shi
2019-05-08 2:59 ` CK Hu [this message]
2019-04-16 6:05 ` [v2 5/5] drm/mediatek: add mt8183 dsi driver support Jitao Shi
2019-05-08 3:00 ` CK Hu
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