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From: CK Hu <ck.hu@mediatek.com>
To: Bibby Hsieh <bibby.hsieh@mediatek.com>
Cc: Jassi Brar <jassisinghbrar@gmail.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Daniel Kurtz <djkurtz@chromium.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, srv_heupstream@mediatek.com,
	Sascha Hauer <kernel@pengutronix.de>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Nicolas Boichat <drinkcat@chromium.org>,
	YT Shen <yt.shen@mediatek.com>,
	Daoyuan Huang <daoyuan.huang@mediatek.com>,
	Jiaguang Zhang <jiaguang.zhang@mediatek.com>,
	Dennis-YC Hsieh <dennis-yc.hsieh@mediatek.com>,
	Houlong Wei <houlong.wei@mediatek.com>,
	ginny.chen@mediatek.com
Subject: Re: [PATCH v7 07/12] soc: mediatek: cmdq: reorder the parameter
Date: Tue, 21 May 2019 10:28:37 +0800	[thread overview]
Message-ID: <1558405717.25526.1.camel@mtksdaap41> (raw)
In-Reply-To: <20190521011108.40428-8-bibby.hsieh@mediatek.com>

Hi, Bibby:

On Tue, 2019-05-21 at 09:11 +0800, Bibby Hsieh wrote:
> The order of instructions gce knowed is [subsys offset value]
> so reorder the parameter of cmdq_pkt_write_mask
> and cmdq_pkt_write function.
> 

Except the word 'knowed',

Reviewed-by: CK Hu <ck.hu@mediatek.com>

> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
> ---
>  drivers/soc/mediatek/mtk-cmdq-helper.c |  6 +++---
>  include/linux/soc/mediatek/mtk-cmdq.h  | 10 +++++-----
>  2 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index ff9fef5a032b..082b8978651e 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -136,7 +136,7 @@ static int cmdq_pkt_append_command(struct cmdq_pkt *pkt, enum cmdq_code code,
>  	return 0;
>  }
>  
> -int cmdq_pkt_write(struct cmdq_pkt *pkt, u32 value, u32 subsys, u32 offset)
> +int cmdq_pkt_write(struct cmdq_pkt *pkt, u32 subsys, u32 offset, u32 value)
>  {
>  	u32 arg_a = (offset & CMDQ_ARG_A_WRITE_MASK) |
>  		    (subsys << CMDQ_SUBSYS_SHIFT);
> @@ -145,8 +145,8 @@ int cmdq_pkt_write(struct cmdq_pkt *pkt, u32 value, u32 subsys, u32 offset)
>  }
>  EXPORT_SYMBOL(cmdq_pkt_write);
>  
> -int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u32 value,
> -			u32 subsys, u32 offset, u32 mask)
> +int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u32 subsys,
> +			u32 offset, u32 value, u32 mask)
>  {
>  	u32 offset_mask = offset;
>  	int err = 0;
> diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
> index 4e8899972db4..39d813dde4b4 100644
> --- a/include/linux/soc/mediatek/mtk-cmdq.h
> +++ b/include/linux/soc/mediatek/mtk-cmdq.h
> @@ -60,26 +60,26 @@ void cmdq_pkt_destroy(struct cmdq_pkt *pkt);
>  /**
>   * cmdq_pkt_write() - append write command to the CMDQ packet
>   * @pkt:	the CMDQ packet
> - * @value:	the specified target register value
>   * @subsys:	the CMDQ sub system code
>   * @offset:	register offset from CMDQ sub system
> + * @value:	the specified target register value
>   *
>   * Return: 0 for success; else the error code is returned
>   */
> -int cmdq_pkt_write(struct cmdq_pkt *pkt, u32 value, u32 subsys, u32 offset);
> +int cmdq_pkt_write(struct cmdq_pkt *pkt, u32 subsys, u32 offset, u32 value);
>  
>  /**
>   * cmdq_pkt_write_mask() - append write command with mask to the CMDQ packet
>   * @pkt:	the CMDQ packet
> - * @value:	the specified target register value
>   * @subsys:	the CMDQ sub system code
>   * @offset:	register offset from CMDQ sub system
> + * @value:	the specified target register value
>   * @mask:	the specified target register mask
>   *
>   * Return: 0 for success; else the error code is returned
>   */
> -int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u32 value,
> -			u32 subsys, u32 offset, u32 mask);
> +int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u32 subsys,
> +			u32 offset, u32 value, u32 mask);
>  
>  /**
>   * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet

  reply	other threads:[~2019-05-21  2:28 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-21  1:10 [PATCH v7 00/12] support gce on mt8183 platform Bibby Hsieh
2019-05-21  1:10 ` [PATCH v7 01/12] dt-binding: gce: remove thread-num property Bibby Hsieh
2019-05-21  1:10 ` [PATCH v7 02/12] dt-binding: gce: add gce header file for mt8183 Bibby Hsieh
2019-05-21  1:10 ` [PATCH v7 03/12] dt-binding: gce: add binding for gce client reg property Bibby Hsieh
2019-05-21  1:11 ` [PATCH v7 04/12] mailbox: mediatek: cmdq: move the CMDQ_IRQ_MASK into cmdq driver data Bibby Hsieh
2019-05-21  1:11 ` [PATCH v7 05/12] mailbox: mediatek: cmdq: support mt8183 gce function Bibby Hsieh
2019-05-21  1:11 ` [PATCH v7 06/12] soc: mediatek: cmdq: clear the event in cmdq initial flow Bibby Hsieh
2019-05-21  1:11 ` [PATCH v7 07/12] soc: mediatek: cmdq: reorder the parameter Bibby Hsieh
2019-05-21  2:28   ` CK Hu [this message]
2019-05-21  1:11 ` [PATCH v7 08/12] soc: mediatek: cmdq: change the type of input parameter Bibby Hsieh
2019-05-21  2:30   ` CK Hu
2019-05-21  1:11 ` [PATCH v7 09/12] soc: mediatek: cmdq: define the instruction struct Bibby Hsieh
2019-05-21  2:48   ` CK Hu
2019-05-21  1:11 ` [PATCH v7 10/12] soc: mediatek: cmdq: add polling function Bibby Hsieh
2019-05-21  1:11 ` [PATCH v7 11/12] soc: mediatek: cmdq: add cmdq_dev_get_client_reg function Bibby Hsieh
2019-05-21  3:30   ` CK Hu
2019-05-21  1:11 ` [PATCH v7 12/12] arm64: dts: add gce node for mt8183 Bibby Hsieh

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