From mboxrd@z Thu Jan 1 00:00:00 1970 From: Robert Chiras Subject: [PATCH v3 13/15] drm/mxsfb: Clear OUTSTANDING_REQS bits Date: Wed, 21 Aug 2019 13:15:53 +0300 Message-ID: <1566382555-12102-14-git-send-email-robert.chiras@nxp.com> References: <1566382555-12102-1-git-send-email-robert.chiras@nxp.com> Return-path: In-Reply-To: <1566382555-12102-1-git-send-email-robert.chiras@nxp.com> Sender: linux-kernel-owner@vger.kernel.org To: =?UTF-8?q?Guido=20G=C3=BCnther?= , Marek Vasut , Stefan Agner , David Airlie , Daniel Vetter , Rob Herring , Mark Rutland , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Pengutronix Kernel Team , NXP Linux Team , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org List-Id: devicetree@vger.kernel.org Bit 21 can alter the CTRL2_OUTSTANDING_REQS value right after the eLCDIF is enabled, since it comes up with default value of 1 (this behaviour has been seen on some imx8 platforms). In order to fix this, clear CTRL2_OUTSTANDING_REQS bits before setting its value. Signed-off-by: Robert Chiras --- drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c index e727f5e..a12f53d 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c @@ -225,6 +225,13 @@ static void mxsfb_enable_controller(struct mxsfb_drm_private *mxsfb) clk_prepare_enable(mxsfb->clk); if (mxsfb->devdata->ipversion >= 4) { + /* + * On some platforms, bit 21 is defaulted to 1, which may alter + * the below setting. So, to make sure we have the right setting + * clear all the bits for CTRL2_OUTSTANDING_REQS. + */ + writel(CTRL2_OUTSTANDING_REQS(0x7), + mxsfb->base + LCDC_V4_CTRL2 + REG_CLR); writel(CTRL2_OUTSTANDING_REQS(REQ_16), mxsfb->base + LCDC_V4_CTRL2 + REG_SET); /* Assert LCD Reset bit */ -- 2.7.4