* [PATCH 0/3] pinctrl: meson-a1: add pinctrl driver
@ 2019-09-17 6:07 Qianggui Song
2019-09-17 6:07 ` [PATCH 1/3] pinctrl: add compatible for Amlogic Meson A1 pin controller Qianggui Song
2019-09-17 6:07 ` [PATCH 3/3] arm64: dts: meson: a1: add pinctrl controller support Qianggui Song
0 siblings, 2 replies; 6+ messages in thread
From: Qianggui Song @ 2019-09-17 6:07 UTC (permalink / raw)
To: Linus Walleij, linux-gpio
Cc: Qianggui Song, Mark Rutland, Hanjie Lin, Jianxin Pan,
Neil Armstrong, Martin Blumenstingl, Kevin Hilman, linux-kernel,
devicetree, Rob Herring, linux-arm-kernel, Carlo Caione,
linux-amlogic, Xingyu Chen, Jerome Brunet
This patchset adds Pin controller driver support for Meson-A1 Soc
which shares the same register layout of pinmux with previous
Meson-G12A, however there is difference for gpio and pin config
registers in A1.
This patchset is based on A1 DTBv4[1].
[1] https://lore.kernel.org/linux-amlogic/1568276370-54181-1-git-send-email-jianxin.pan@amlogic.com
Qianggui Song (3):
pinctrl: add compatible for Amlogic Meson A1 pin controller
pinctrl: meson-a1: add pinctrl driver for Meson A1 Soc
arm64: dts: meson: a1: add pinctrl controller support
.../devicetree/bindings/pinctrl/meson,pinctrl.txt | 1 +
arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 18 +
drivers/pinctrl/meson/Kconfig | 6 +
drivers/pinctrl/meson/Makefile | 1 +
drivers/pinctrl/meson/pinctrl-meson-a1.c | 942 +++++++++++++++++++++
drivers/pinctrl/meson/pinctrl-meson.c | 8 +-
drivers/pinctrl/meson/pinctrl-meson.h | 9 +
include/dt-bindings/gpio/meson-a1-gpio.h | 73 ++
8 files changed, 1056 insertions(+), 2 deletions(-)
create mode 100644 drivers/pinctrl/meson/pinctrl-meson-a1.c
create mode 100644 include/dt-bindings/gpio/meson-a1-gpio.h
--
1.9.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/3] pinctrl: add compatible for Amlogic Meson A1 pin controller
2019-09-17 6:07 [PATCH 0/3] pinctrl: meson-a1: add pinctrl driver Qianggui Song
@ 2019-09-17 6:07 ` Qianggui Song
2019-09-17 7:18 ` Neil Armstrong
2019-09-30 22:47 ` Rob Herring
2019-09-17 6:07 ` [PATCH 3/3] arm64: dts: meson: a1: add pinctrl controller support Qianggui Song
1 sibling, 2 replies; 6+ messages in thread
From: Qianggui Song @ 2019-09-17 6:07 UTC (permalink / raw)
To: Linus Walleij, linux-gpio
Cc: Qianggui Song, Mark Rutland, Hanjie Lin, Jianxin Pan,
Neil Armstrong, Martin Blumenstingl, Kevin Hilman, linux-kernel,
devicetree, Rob Herring, linux-arm-kernel, Carlo Caione,
linux-amlogic, Xingyu Chen, Jerome Brunet
Add new compatible name for Amlogic's Meson-A1 pin controller
add a dt-binding header file which document the detail pin names.
Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
---
.../devicetree/bindings/pinctrl/meson,pinctrl.txt | 1 +
include/dt-bindings/gpio/meson-a1-gpio.h | 73 ++++++++++++++++++++++
2 files changed, 74 insertions(+)
create mode 100644 include/dt-bindings/gpio/meson-a1-gpio.h
diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
index 10dc4f7..0aff1f2 100644
--- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
@@ -15,6 +15,7 @@ Required properties for the root node:
"amlogic,meson-axg-aobus-pinctrl"
"amlogic,meson-g12a-periphs-pinctrl"
"amlogic,meson-g12a-aobus-pinctrl"
+ "amlogic,meson-a1-periphs-pinctrl"
- reg: address and size of registers controlling irq functionality
=== GPIO sub-nodes ===
diff --git a/include/dt-bindings/gpio/meson-a1-gpio.h b/include/dt-bindings/gpio/meson-a1-gpio.h
new file mode 100644
index 0000000..40e57a5
--- /dev/null
+++ b/include/dt-bindings/gpio/meson-a1-gpio.h
@@ -0,0 +1,73 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
+/*
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
+ * Author: Qianggui Song <qianggui.song@amlogic.com>
+ */
+
+#ifndef _DT_BINDINGS_MESON_A1_GPIO_H
+#define _DT_BINDINGS_MESON_A1_GPIO_H
+
+#define GPIOP_0 0
+#define GPIOP_1 1
+#define GPIOP_2 2
+#define GPIOP_3 3
+#define GPIOP_4 4
+#define GPIOP_5 5
+#define GPIOP_6 6
+#define GPIOP_7 7
+#define GPIOP_8 8
+#define GPIOP_9 9
+#define GPIOP_10 10
+#define GPIOP_11 11
+#define GPIOP_12 12
+#define GPIOB_0 13
+#define GPIOB_1 14
+#define GPIOB_2 15
+#define GPIOB_3 16
+#define GPIOB_4 17
+#define GPIOB_5 18
+#define GPIOB_6 19
+#define GPIOX_0 20
+#define GPIOX_1 21
+#define GPIOX_2 22
+#define GPIOX_3 23
+#define GPIOX_4 24
+#define GPIOX_5 25
+#define GPIOX_6 26
+#define GPIOX_7 27
+#define GPIOX_8 28
+#define GPIOX_9 29
+#define GPIOX_10 30
+#define GPIOX_11 31
+#define GPIOX_12 32
+#define GPIOX_13 33
+#define GPIOX_14 34
+#define GPIOX_15 35
+#define GPIOX_16 36
+#define GPIOF_0 37
+#define GPIOF_1 38
+#define GPIOF_2 39
+#define GPIOF_3 40
+#define GPIOF_4 41
+#define GPIOF_5 42
+#define GPIOF_6 43
+#define GPIOF_7 44
+#define GPIOF_8 45
+#define GPIOF_9 46
+#define GPIOF_10 47
+#define GPIOF_11 48
+#define GPIOF_12 49
+#define GPIOA_0 50
+#define GPIOA_1 51
+#define GPIOA_2 52
+#define GPIOA_3 53
+#define GPIOA_4 54
+#define GPIOA_5 55
+#define GPIOA_6 56
+#define GPIOA_7 57
+#define GPIOA_8 58
+#define GPIOA_9 59
+#define GPIOA_10 60
+#define GPIOA_11 61
+
+#endif /* _DT_BINDINGS_MESON_A1_GPIO_H */
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 3/3] arm64: dts: meson: a1: add pinctrl controller support
2019-09-17 6:07 [PATCH 0/3] pinctrl: meson-a1: add pinctrl driver Qianggui Song
2019-09-17 6:07 ` [PATCH 1/3] pinctrl: add compatible for Amlogic Meson A1 pin controller Qianggui Song
@ 2019-09-17 6:07 ` Qianggui Song
1 sibling, 0 replies; 6+ messages in thread
From: Qianggui Song @ 2019-09-17 6:07 UTC (permalink / raw)
To: Linus Walleij, linux-gpio
Cc: Qianggui Song, Mark Rutland, Hanjie Lin, Jianxin Pan,
Neil Armstrong, Martin Blumenstingl, Kevin Hilman, linux-kernel,
devicetree, Rob Herring, linux-arm-kernel, Carlo Caione,
linux-amlogic, Xingyu Chen, Jerome Brunet
add peripheral pinctrl controller to a1 soc
Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
---
arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
index 7210ad0..0965259 100644
--- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
@@ -5,6 +5,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/gpio/meson-a1-gpio.h>
/ {
compatible = "amlogic,a1";
@@ -74,6 +75,23 @@
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x1000000>;
+ periphs_pinctrl: pinctrl@0400 {
+ compatible = "amlogic,meson-a1-periphs-pinctrl";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gpio: bank@0400 {
+ reg = <0x0 0x0400 0x0 0x003c>,
+ <0x0 0x0480 0x0 0x0118>;
+ reg-names = "mux", "gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&periphs_pinctrl 0 0 62>;
+ };
+
+ };
+
uart_AO: serial@1c00 {
compatible = "amlogic,meson-gx-uart",
"amlogic,meson-ao-uart";
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/3] pinctrl: add compatible for Amlogic Meson A1 pin controller
2019-09-17 6:07 ` [PATCH 1/3] pinctrl: add compatible for Amlogic Meson A1 pin controller Qianggui Song
@ 2019-09-17 7:18 ` Neil Armstrong
2019-09-17 10:29 ` Qianggui Song
2019-09-30 22:47 ` Rob Herring
1 sibling, 1 reply; 6+ messages in thread
From: Neil Armstrong @ 2019-09-17 7:18 UTC (permalink / raw)
To: Qianggui Song, Linus Walleij, linux-gpio
Cc: Xingyu Chen, Jianxin Pan, Jerome Brunet, Kevin Hilman,
Martin Blumenstingl, Carlo Caione, Rob Herring, Hanjie Lin,
Mark Rutland, linux-arm-kernel, linux-amlogic, linux-kernel,
devicetree
Hi,
On 17/09/2019 08:07, Qianggui Song wrote:
> Add new compatible name for Amlogic's Meson-A1 pin controller
> add a dt-binding header file which document the detail pin names.
Please add in the commit log that A1 doesn't need the DS bank reg,
so when we will convert these bindings to yaml we will be aware of it.
>
> Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
> Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
> Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
> ---
> .../devicetree/bindings/pinctrl/meson,pinctrl.txt | 1 +
> include/dt-bindings/gpio/meson-a1-gpio.h | 73 ++++++++++++++++++++++
> 2 files changed, 74 insertions(+)
> create mode 100644 include/dt-bindings/gpio/meson-a1-gpio.h
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
> index 10dc4f7..0aff1f2 100644
> --- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
> +++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
> @@ -15,6 +15,7 @@ Required properties for the root node:
> "amlogic,meson-axg-aobus-pinctrl"
> "amlogic,meson-g12a-periphs-pinctrl"
> "amlogic,meson-g12a-aobus-pinctrl"
> + "amlogic,meson-a1-periphs-pinctrl"
> - reg: address and size of registers controlling irq functionality
>
> === GPIO sub-nodes ===
> diff --git a/include/dt-bindings/gpio/meson-a1-gpio.h b/include/dt-bindings/gpio/meson-a1-gpio.h
> new file mode 100644
> index 0000000..40e57a5
> --- /dev/null
> +++ b/include/dt-bindings/gpio/meson-a1-gpio.h
> @@ -0,0 +1,73 @@
> +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
> +/*
> + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
> + * Author: Qianggui Song <qianggui.song@amlogic.com>
> + */
> +
> +#ifndef _DT_BINDINGS_MESON_A1_GPIO_H
> +#define _DT_BINDINGS_MESON_A1_GPIO_H
> +
> +#define GPIOP_0 0
> +#define GPIOP_1 1
> +#define GPIOP_2 2
> +#define GPIOP_3 3
> +#define GPIOP_4 4
> +#define GPIOP_5 5
> +#define GPIOP_6 6
> +#define GPIOP_7 7
> +#define GPIOP_8 8
> +#define GPIOP_9 9
> +#define GPIOP_10 10
> +#define GPIOP_11 11
> +#define GPIOP_12 12
> +#define GPIOB_0 13
> +#define GPIOB_1 14
> +#define GPIOB_2 15
> +#define GPIOB_3 16
> +#define GPIOB_4 17
> +#define GPIOB_5 18
> +#define GPIOB_6 19
> +#define GPIOX_0 20
> +#define GPIOX_1 21
> +#define GPIOX_2 22
> +#define GPIOX_3 23
> +#define GPIOX_4 24
> +#define GPIOX_5 25
> +#define GPIOX_6 26
> +#define GPIOX_7 27
> +#define GPIOX_8 28
> +#define GPIOX_9 29
> +#define GPIOX_10 30
> +#define GPIOX_11 31
> +#define GPIOX_12 32
> +#define GPIOX_13 33
> +#define GPIOX_14 34
> +#define GPIOX_15 35
> +#define GPIOX_16 36
> +#define GPIOF_0 37
> +#define GPIOF_1 38
> +#define GPIOF_2 39
> +#define GPIOF_3 40
> +#define GPIOF_4 41
> +#define GPIOF_5 42
> +#define GPIOF_6 43
> +#define GPIOF_7 44
> +#define GPIOF_8 45
> +#define GPIOF_9 46
> +#define GPIOF_10 47
> +#define GPIOF_11 48
> +#define GPIOF_12 49
> +#define GPIOA_0 50
> +#define GPIOA_1 51
> +#define GPIOA_2 52
> +#define GPIOA_3 53
> +#define GPIOA_4 54
> +#define GPIOA_5 55
> +#define GPIOA_6 56
> +#define GPIOA_7 57
> +#define GPIOA_8 58
> +#define GPIOA_9 59
> +#define GPIOA_10 60
> +#define GPIOA_11 61
> +
> +#endif /* _DT_BINDINGS_MESON_A1_GPIO_H */
>
With that fixed,
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Neil
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/3] pinctrl: add compatible for Amlogic Meson A1 pin controller
2019-09-17 7:18 ` Neil Armstrong
@ 2019-09-17 10:29 ` Qianggui Song
0 siblings, 0 replies; 6+ messages in thread
From: Qianggui Song @ 2019-09-17 10:29 UTC (permalink / raw)
To: Neil Armstrong, Linus Walleij, linux-gpio
Cc: Xingyu Chen, Jianxin Pan, Jerome Brunet, Kevin Hilman,
Martin Blumenstingl, Carlo Caione, Rob Herring, Hanjie Lin,
Mark Rutland, linux-arm-kernel, linux-amlogic, linux-kernel,
devicetree
Hi, Neil
Thanks for your review
On 2019/9/17 15:18, Neil Armstrong wrote:
> Hi,
>
> On 17/09/2019 08:07, Qianggui Song wrote:
>> Add new compatible name for Amlogic's Meson-A1 pin controller
>> add a dt-binding header file which document the detail pin names.
>
> Please add in the commit log that A1 doesn't need the DS bank reg,
> so when we will convert these bindings to yaml we will be aware of it.
>
OK, will add it in the next patch
>>
>> Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
>> Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
>> Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
>> ---
>> .../devicetree/bindings/pinctrl/meson,pinctrl.txt | 1 +
>> include/dt-bindings/gpio/meson-a1-gpio.h | 73 ++++++++++++++++++++++
>> 2 files changed, 74 insertions(+)
>> create mode 100644 include/dt-bindings/gpio/meson-a1-gpio.h
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
>> index 10dc4f7..0aff1f2 100644
>> --- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
>> +++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
>> @@ -15,6 +15,7 @@ Required properties for the root node:
>> "amlogic,meson-axg-aobus-pinctrl"
>> "amlogic,meson-g12a-periphs-pinctrl"
>> "amlogic,meson-g12a-aobus-pinctrl"
>> + "amlogic,meson-a1-periphs-pinctrl"
>> - reg: address and size of registers controlling irq functionality
>>
>> === GPIO sub-nodes ===
>> diff --git a/include/dt-bindings/gpio/meson-a1-gpio.h b/include/dt-bindings/gpio/meson-a1-gpio.h
>> new file mode 100644
>> index 0000000..40e57a5
>> --- /dev/null
>> +++ b/include/dt-bindings/gpio/meson-a1-gpio.h
>> @@ -0,0 +1,73 @@
>> +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
>> +/*
>> + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
>> + * Author: Qianggui Song <qianggui.song@amlogic.com>
>> + */
>> +
>> +#ifndef _DT_BINDINGS_MESON_A1_GPIO_H
>> +#define _DT_BINDINGS_MESON_A1_GPIO_H
>> +
>> +#define GPIOP_0 0
>> +#define GPIOP_1 1
>> +#define GPIOP_2 2
>> +#define GPIOP_3 3
>> +#define GPIOP_4 4
>> +#define GPIOP_5 5
>> +#define GPIOP_6 6
>> +#define GPIOP_7 7
>> +#define GPIOP_8 8
>> +#define GPIOP_9 9
>> +#define GPIOP_10 10
>> +#define GPIOP_11 11
>> +#define GPIOP_12 12
>> +#define GPIOB_0 13
>> +#define GPIOB_1 14
>> +#define GPIOB_2 15
>> +#define GPIOB_3 16
>> +#define GPIOB_4 17
>> +#define GPIOB_5 18
>> +#define GPIOB_6 19
>> +#define GPIOX_0 20
>> +#define GPIOX_1 21
>> +#define GPIOX_2 22
>> +#define GPIOX_3 23
>> +#define GPIOX_4 24
>> +#define GPIOX_5 25
>> +#define GPIOX_6 26
>> +#define GPIOX_7 27
>> +#define GPIOX_8 28
>> +#define GPIOX_9 29
>> +#define GPIOX_10 30
>> +#define GPIOX_11 31
>> +#define GPIOX_12 32
>> +#define GPIOX_13 33
>> +#define GPIOX_14 34
>> +#define GPIOX_15 35
>> +#define GPIOX_16 36
>> +#define GPIOF_0 37
>> +#define GPIOF_1 38
>> +#define GPIOF_2 39
>> +#define GPIOF_3 40
>> +#define GPIOF_4 41
>> +#define GPIOF_5 42
>> +#define GPIOF_6 43
>> +#define GPIOF_7 44
>> +#define GPIOF_8 45
>> +#define GPIOF_9 46
>> +#define GPIOF_10 47
>> +#define GPIOF_11 48
>> +#define GPIOF_12 49
>> +#define GPIOA_0 50
>> +#define GPIOA_1 51
>> +#define GPIOA_2 52
>> +#define GPIOA_3 53
>> +#define GPIOA_4 54
>> +#define GPIOA_5 55
>> +#define GPIOA_6 56
>> +#define GPIOA_7 57
>> +#define GPIOA_8 58
>> +#define GPIOA_9 59
>> +#define GPIOA_10 60
>> +#define GPIOA_11 61
>> +
>> +#endif /* _DT_BINDINGS_MESON_A1_GPIO_H */
>>
>
>
> With that fixed,
>
> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
>
> Neil
>
> .
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/3] pinctrl: add compatible for Amlogic Meson A1 pin controller
2019-09-17 6:07 ` [PATCH 1/3] pinctrl: add compatible for Amlogic Meson A1 pin controller Qianggui Song
2019-09-17 7:18 ` Neil Armstrong
@ 2019-09-30 22:47 ` Rob Herring
1 sibling, 0 replies; 6+ messages in thread
From: Rob Herring @ 2019-09-30 22:47 UTC (permalink / raw)
Cc: Linus Walleij, linux-gpio, Qianggui Song, Mark Rutland,
Hanjie Lin, Jianxin Pan, Neil Armstrong, Martin Blumenstingl,
Kevin Hilman, linux-kernel, devicetree, linux-arm-kernel,
Carlo Caione, linux-amlogic, Xingyu Chen, Jerome Brunet
On Tue, 17 Sep 2019 14:07:20 +0800, Qianggui Song wrote:
> Add new compatible name for Amlogic's Meson-A1 pin controller
> add a dt-binding header file which document the detail pin names.
>
> Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
> Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
> Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
> ---
> .../devicetree/bindings/pinctrl/meson,pinctrl.txt | 1 +
> include/dt-bindings/gpio/meson-a1-gpio.h | 73 ++++++++++++++++++++++
> 2 files changed, 74 insertions(+)
> create mode 100644 include/dt-bindings/gpio/meson-a1-gpio.h
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-09-30 22:47 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-09-17 6:07 [PATCH 0/3] pinctrl: meson-a1: add pinctrl driver Qianggui Song
2019-09-17 6:07 ` [PATCH 1/3] pinctrl: add compatible for Amlogic Meson A1 pin controller Qianggui Song
2019-09-17 7:18 ` Neil Armstrong
2019-09-17 10:29 ` Qianggui Song
2019-09-30 22:47 ` Rob Herring
2019-09-17 6:07 ` [PATCH 3/3] arm64: dts: meson: a1: add pinctrl controller support Qianggui Song
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