From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jianxin Pan Subject: [PATCH RESEND v2 4/4] arm64: dts: meson: a1: add secure power domain controller Date: Thu, 10 Oct 2019 04:21:18 -0400 Message-ID: <1570695678-42623-5-git-send-email-jianxin.pan@amlogic.com> References: <1570695678-42623-1-git-send-email-jianxin.pan@amlogic.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1570695678-42623-1-git-send-email-jianxin.pan@amlogic.com> Sender: linux-kernel-owner@vger.kernel.org To: Kevin Hilman , linux-amlogic@lists.infradead.org Cc: Jianxin Pan , Rob Herring , Neil Armstrong , Jerome Brunet , Martin Blumenstingl , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Jian Hu , Hanjie Lin , Victor Wan , Xingyu Chen List-Id: devicetree@vger.kernel.org Enable power domain controller for Meson A1 SoC. Signed-off-by: Jianxin Pan --- arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi index 7210ad0..5547913 100644 --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi @@ -93,6 +93,13 @@ clock-names = "xtal", "pclk", "baud"; status = "disabled"; }; + + pwrc: power-controller { + compatible = "amlogic,meson-a1-pwrc"; + #power-domain-cells = <1>; + secure-monitor = <&sm>; + status = "okay"; + }; }; gic: interrupt-controller@ff901000 { -- 2.7.4