From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A066C43603 for ; Tue, 17 Dec 2019 20:04:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5326C2072D for ; Tue, 17 Dec 2019 20:04:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="m8g9qgQA" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728303AbfLQUEo (ORCPT ); Tue, 17 Dec 2019 15:04:44 -0500 Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:2802 "EHLO hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728152AbfLQUEZ (ORCPT ); Tue, 17 Dec 2019 15:04:25 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Tue, 17 Dec 2019 12:03:56 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 17 Dec 2019 12:04:24 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 17 Dec 2019 12:04:24 -0800 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 17 Dec 2019 20:04:24 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 17 Dec 2019 20:04:24 +0000 Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Tue, 17 Dec 2019 20:04:24 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.174.101]) by hqnvemgw03.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Tue, 17 Dec 2019 12:04:23 -0800 From: Sowjanya Komatineni To: , , , , , , , , CC: , , , , , , , , , , Subject: [PATCH v4 18/19] arm64: tegra: smaug: Change clk_out_2 provider to pmc Date: Tue, 17 Dec 2019 12:04:05 -0800 Message-ID: <1576613046-17159-19-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1576613046-17159-1-git-send-email-skomatineni@nvidia.com> References: <1576613046-17159-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1576613037; bh=IV1BFOTwCZW6GqstWcTilpsrGY1rMODSrhEyFKpDirc=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=m8g9qgQAIL/eP7z0eyaz+g7vzpzVZw7zaXBt8iQpwqBDxPIy7tAd6nTFXFk1BCFxT j2EYyff+bfmFsFvQ3rVJSI/onMp1TjQUg595Ot1+qD8FB9nPdCKSy/KBKj1gCwilt1 eVypvu4Hu6sWIu3ihezbqgy+m2QPft5SbwXCizqmG2i5mH0IWIFERK1mEn5fhJQl5T +kQ6kg46n45W8UHaRgxdmOfq7bmHOous3damZiMxe/CHU7FidA73EKE/24B84iYIYV 9pSZIuUIqvZvy38JfjRyEjIWuXh7SJNKcw/j95nsqFIbkRVltJm44GC5xN5WQwcnNC wjSrWiAbFrUcw== Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org clk_out_2 is one of the clocks from Tegra PMC block and Tegra PMC clocks are moved from clock driver to pmc driver with pmc as clock provider and using pmc clock ids. This patch changes clk_out_2 provider to pmc and uses corresponding pmc clock id for clk_out_2. Signed-off-by: Sowjanya Komatineni --- arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts index 72c7a04ac1df..4376c38d78f4 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts @@ -1592,7 +1592,7 @@ reg = <0x1a>; interrupt-parent = <&gpio>; interrupts = ; - clocks = <&tegra_car TEGRA210_CLK_CLK_OUT_2>; + clocks = <&pmc TEGRA_PMC_CLK_OUT_2>; clock-names = "mclk"; nuvoton,jkdet-enable; -- 2.7.4