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From: Yongqiang Niu <yongqiang.niu@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	"David Airlie" <airlied@linux.ie>,
	Daniel Vetter <daniel@ffwll.ch>,
	Mark Rutland <mark.rutland@arm.com>,
	<dri-devel@lists.freedesktop.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>
Subject: Re: [PATCH v6, 02/14] drm/mediatek: move dsi/dpi select input into mtk_ddp_sel_in
Date: Thu, 2 Jan 2020 15:00:04 +0800	[thread overview]
Message-ID: <1577948404.15116.18.camel@mhfsdcap03> (raw)
In-Reply-To: <1577947234.4925.2.camel@mtksdaap41>

On Thu, 2020-01-02 at 14:40 +0800, CK Hu wrote:
> Hi, Yongqiang:
> 
> On Thu, 2020-01-02 at 14:21 +0800, Yongqiang Niu wrote:
> > On Thu, 2020-01-02 at 14:02 +0800, CK Hu wrote:
> > > Hi, Yongqiang:
> > > 
> > > On Thu, 2020-01-02 at 13:39 +0800, Yongqiang Niu wrote:
> > > > On Thu, 2020-01-02 at 13:03 +0800, CK Hu wrote:
> > > > > Hi, Yongqiang:
> > > > > 
> > > > > On Thu, 2020-01-02 at 12:00 +0800, Yongqiang Niu wrote:
> > > > > > move dsi/dpi select input into mtk_ddp_sel_in
> > > > > > 
> > > > > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> > > > > > ---
> > > > > >  drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 10 ++++++----
> > > > > >  1 file changed, 6 insertions(+), 4 deletions(-)
> > > > > > 
> > > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> > > > > > index 39700b9..91c9b19 100644
> > > > > > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> > > > > > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> > > > > > @@ -376,6 +376,12 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur,
> > > > > >  	} else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) {
> > > > > >  		*addr = DISP_REG_CONFIG_DSI_SEL;
> > > > > >  		value = DSI_SEL_IN_BLS;
> > > > > > +	} else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI0) {
> > > > > > +		*addr = DISP_REG_CONFIG_DSI_SEL;
> > > > > > +		value = DSI_SEL_IN_RDMA;
> > > > > 
> > > > > In original code, this is set when cur == DDP_COMPONENT_BLS and next ==
> > > > > DDP_COMPONENT_DPI0. Why do you change the condition?
> > > > > 
> > > > > Regards,
> > > > > CK
> > > > 
> > > > if bls connect with dpi0, rdma1 should connect with dsi0, the condition
> > > > is same with before.
> > > 
> > > You suggest that two crtcs are both enabled. If only one crtc is
> > > enabled, just one of these two would be set.
> > > 
> > > Regards,
> > > CK
> > 
> > OK, i will modify like this
> > else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) {
> > 		*addr = DISP_REG_CONFIG_DSI_SEL;
> > 		value = DPI_SEL_IN_RDMA;
> > 	}
> > in mtk_ddp_sel_in.
> > 
> > don't set DISP_REG_CONFIG_DPI_SEL to DPI_SEL_IN_BLS anymore, because
> > DPI_SEL_IN_BLS is zero, it is same with hardware default setting.
> 
> In Bibby's case, there is only the path from BLS to DPI0 and has no path
> from RDMA1 to DSI0, but it need to set these two register. Maybe its
> setting is just for some SoC, so you may use the compatible name to
> judge how to set this two register.
> 
> Regards,
> CK
> 

it the original use case, if bls->dpi0, it set 3 register,
DISP_REG_CONFIG_DPI_SEL set to DPI_SEL_IN_BLS ,and this is 
0, so this is useless setting.

then are only 2 useful setting.
in this patch i have upload, i keep DISP_REG_CONFIG_OUT_SEL
still in mtk_ddp_sout_sel.
and only move DISP_REG_CONFIG_DSI_SEL into mtk_ddp_sel_in.
i suppose this is enough for this use case.
and no need compatible name to control this.
please double confirm.

and there will more and more SOC upstream in the future.
these function will be more complex.
there should be coding one more suitable function to 
handle these connection

> > > 
> > > > > 
> > > > > > +	} else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) {
> > > > > > +		*addr = DISP_REG_CONFIG_DPI_SEL;
> > > > > > +		value = DPI_SEL_IN_BLS;
> > > > > >  	} else {
> > > > > >  		value = 0;
> > > > > >  	}
> > > > > > @@ -393,10 +399,6 @@ static void mtk_ddp_sout_sel(struct regmap *config_regs,
> > > > > >  	} else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) {
> > > > > >  		regmap_write(config_regs, DISP_REG_CONFIG_OUT_SEL,
> > > > > >  				BLS_TO_DPI_RDMA1_TO_DSI);
> > > > > > -		regmap_write(config_regs, DISP_REG_CONFIG_DSI_SEL,
> > > > > > -				DSI_SEL_IN_RDMA);
> > > > > > -		regmap_write(config_regs, DISP_REG_CONFIG_DPI_SEL,
> > > > > > -				DPI_SEL_IN_BLS);
> > > > > >  	}
> > > > > >  }
> > > > > >  
> > > > > 
> > > > > 
> > > > 
> > > > 
> > > 
> > > 
> > 
> > 
> 
> 


  reply	other threads:[~2020-01-02  7:01 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-02  4:00 [PATCH v6, 00/14] add drm support for MT8183 Yongqiang Niu
2020-01-02  4:00 ` [PATCH v6, 01/14] arm64: dts: add display nodes for mt8183 Yongqiang Niu
2020-01-02  4:00 ` [PATCH v6, 02/14] drm/mediatek: move dsi/dpi select input into mtk_ddp_sel_in Yongqiang Niu
2020-01-02  5:03   ` CK Hu
2020-01-02  5:39     ` Yongqiang Niu
2020-01-02  6:02       ` CK Hu
2020-01-02  6:21         ` Yongqiang Niu
2020-01-02  6:40           ` CK Hu
2020-01-02  7:00             ` Yongqiang Niu [this message]
2020-01-02  4:00 ` [PATCH v6, 03/14] drm/mediatek: make sout select function format same with select input Yongqiang Niu
2020-01-02  4:00 ` [PATCH v6, 04/14] drm/mediatek: add mmsys private data for ddp path config Yongqiang Niu
2020-01-02  5:33   ` CK Hu
2020-01-02  5:45     ` Yongqiang Niu
2020-01-02  4:00 ` [PATCH v6, 05/14] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel Yongqiang Niu
2020-01-02  4:00 ` [PATCH v6, 06/14] drm/mediatek: add connection from OVL0 to OVL_2L0 Yongqiang Niu
2020-01-02  4:00 ` [PATCH v6, 07/14] drm/mediatek: add connection from RDMA0 to COLOR0 Yongqiang Niu
2020-01-02  4:00 ` [PATCH v6, 08/14] drm/mediatek: add connection from RDMA1 to DSI0 Yongqiang Niu
2020-01-02  4:00 ` [PATCH v6, 09/14] drm/mediatek: add connection from OVL_2L0 to RDMA0 Yongqiang Niu
2020-01-02  4:00 ` [PATCH v6, 10/14] drm/mediatek: add connection from OVL_2L1 to RDMA1 Yongqiang Niu
2020-01-02  4:00 ` [PATCH v6, 11/14] drm/mediatek: add connection from DITHER0 to DSI0 Yongqiang Niu
2020-01-02  4:00 ` [PATCH v6, 12/14] drm/mediatek: add connection from RDMA0 " Yongqiang Niu
2020-01-02  4:00 ` [PATCH v6, 13/14] drm/mediatek: add fifo_size into rdma private data Yongqiang Niu
2020-01-02  5:20   ` CK Hu
2020-01-02  5:42     ` Yongqiang Niu
2020-01-02  7:31       ` CK Hu
2020-01-02  4:00 ` [PATCH v6, 14/14] drm/mediatek: add support for mediatek SOC MT8183 Yongqiang Niu
2020-01-02  5:46   ` CK Hu

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