From: Wesley Cheng <wcheng@codeaurora.org>
To: agross@kernel.org, bjorn.andersson@linaro.org,
mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org,
mark.rutland@arm.com
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
Wesley Cheng <wcheng@codeaurora.org>
Subject: [PATCH v2 0/2] Enable SS/HS USB support on SM8150
Date: Tue, 17 Mar 2020 13:53:30 -0700 [thread overview]
Message-ID: <1584478412-7798-1-git-send-email-wcheng@codeaurora.org> (raw)
Add required device tree nodes to enable the USB SS and HS
paths on the primary USB controller on SM8150. In addition,
implement missing resources from the SM8150 GCC driver, which
includes the USB GDSC and the USB PIPE clocks.
Changes in v2:
- Combine GDSC and USB PIPE clock changes.
- Re-order DTS nodes based on address
Jack Pham (1):
arm64: dts: qcom: sm8150: Add USB and PHY device nodes
Wesley Cheng (1):
clk: qcom: gcc: Add USB3 PIPE clock and GDSC for SM8150
arch/arm64/boot/dts/qcom/sm8150-mtp.dts | 17 ++++++
arch/arm64/boot/dts/qcom/sm8150.dtsi | 92 +++++++++++++++++++++++++++++
drivers/clk/qcom/gcc-sm8150.c | 52 ++++++++++++++++
include/dt-bindings/clock/qcom,gcc-sm8150.h | 4 ++
4 files changed, 165 insertions(+)
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next reply other threads:[~2020-03-17 20:53 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-17 20:53 Wesley Cheng [this message]
2020-03-17 20:53 ` [PATCH v2 1/2] clk: qcom: gcc: Add USB3 PIPE clock and GDSC for SM8150 Wesley Cheng
2020-03-20 23:33 ` Stephen Boyd
2020-03-20 23:34 ` Stephen Boyd
2020-03-21 0:25 ` Wesley Cheng
2020-03-21 0:45 ` Stephen Boyd
2020-03-17 20:53 ` [PATCH v2 2/2] arm64: dts: qcom: sm8150: Add USB and PHY device nodes Wesley Cheng
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