From: Rajendra Nayak <rnayak@codeaurora.org>
To: viresh.kumar@linaro.org, sboyd@kernel.org,
bjorn.andersson@linaro.org, agross@kernel.org
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, mka@chromium.org,
Rajendra Nayak <rnayak@codeaurora.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Akash Asthana <akashast@codeaurora.org>,
linux-serial@vger.kernel.org
Subject: [PATCH v2 01/17] tty: serial: qcom_geni_serial: Use OPP API to set clk/perf state
Date: Fri, 17 Apr 2020 19:34:23 +0530 [thread overview]
Message-ID: <1587132279-27659-2-git-send-email-rnayak@codeaurora.org> (raw)
In-Reply-To: <1587132279-27659-1-git-send-email-rnayak@codeaurora.org>
geni serial needs to express a perforamnce state requirement on CX
powerdomain depending on the frequency of the clock rates.
Use OPP table from DT to register with OPP framework and use
dev_pm_opp_set_rate() to set the clk/perf state.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Akash Asthana <akashast@codeaurora.org>
Cc: linux-serial@vger.kernel.org
---
drivers/tty/serial/qcom_geni_serial.c | 30 +++++++++++++++++++++++++-----
include/linux/qcom-geni-se.h | 2 ++
2 files changed, 27 insertions(+), 5 deletions(-)
diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c
index 6119090..151012c 100644
--- a/drivers/tty/serial/qcom_geni_serial.c
+++ b/drivers/tty/serial/qcom_geni_serial.c
@@ -9,6 +9,7 @@
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
+#include <linux/pm_opp.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/pm_wakeirq.h>
@@ -128,6 +129,7 @@ struct qcom_geni_serial_port {
int wakeup_irq;
bool rx_tx_swap;
bool cts_rts_swap;
+ bool opp_table;
};
static const struct uart_ops qcom_geni_console_pops;
@@ -961,7 +963,7 @@ static void qcom_geni_serial_set_termios(struct uart_port *uport,
goto out_restart_rx;
uport->uartclk = clk_rate;
- clk_set_rate(port->se.clk, clk_rate);
+ dev_pm_opp_set_rate(uport->dev, clk_rate);
ser_clk_cfg = SER_CLK_EN;
ser_clk_cfg |= clk_div << CLK_DIV_SHFT;
@@ -1198,8 +1200,11 @@ static void qcom_geni_serial_pm(struct uart_port *uport,
if (new_state == UART_PM_STATE_ON && old_state == UART_PM_STATE_OFF)
geni_se_resources_on(&port->se);
else if (new_state == UART_PM_STATE_OFF &&
- old_state == UART_PM_STATE_ON)
+ old_state == UART_PM_STATE_ON) {
+ /* Drop the performance state vote */
+ dev_pm_opp_set_rate(uport->dev, 0);
geni_se_resources_off(&port->se);
+ }
}
static const struct uart_ops qcom_geni_console_pops = {
@@ -1318,13 +1323,20 @@ static int qcom_geni_serial_probe(struct platform_device *pdev)
if (of_property_read_bool(pdev->dev.of_node, "cts-rts-swap"))
port->cts_rts_swap = true;
+ port->se.opp = dev_pm_opp_set_clkname(&pdev->dev, "se");
+ if (IS_ERR(port->se.opp))
+ return PTR_ERR(port->se.opp);
+ /* OPP table is optional */
+ if (!dev_pm_opp_of_add_table(&pdev->dev))
+ port->opp_table = true;
+
uport->private_data = drv;
platform_set_drvdata(pdev, port);
port->handle_rx = console ? handle_rx_console : handle_rx_uart;
ret = uart_add_one_port(drv, uport);
if (ret)
- return ret;
+ goto err;
irq_set_status_flags(uport->irq, IRQ_NOAUTOEN);
ret = devm_request_irq(uport->dev, uport->irq, qcom_geni_serial_isr,
@@ -1332,7 +1344,7 @@ static int qcom_geni_serial_probe(struct platform_device *pdev)
if (ret) {
dev_err(uport->dev, "Failed to get IRQ ret %d\n", ret);
uart_remove_one_port(drv, uport);
- return ret;
+ goto err;
}
/*
@@ -1349,11 +1361,16 @@ static int qcom_geni_serial_probe(struct platform_device *pdev)
if (ret) {
device_init_wakeup(&pdev->dev, false);
uart_remove_one_port(drv, uport);
- return ret;
+ goto err;
}
}
return 0;
+err:
+ if (port->opp_table)
+ dev_pm_opp_of_remove_table(&pdev->dev);
+ dev_pm_opp_put_clkname(port->se.opp);
+ return ret;
}
static int qcom_geni_serial_remove(struct platform_device *pdev)
@@ -1361,6 +1378,9 @@ static int qcom_geni_serial_remove(struct platform_device *pdev)
struct qcom_geni_serial_port *port = platform_get_drvdata(pdev);
struct uart_driver *drv = port->uport.private_data;
+ if (port->opp_table)
+ dev_pm_opp_of_remove_table(&pdev->dev);
+ dev_pm_opp_put_clkname(port->se.opp);
dev_pm_clear_wake_irq(&pdev->dev);
device_init_wakeup(&pdev->dev, false);
uart_remove_one_port(drv, &port->uport);
diff --git a/include/linux/qcom-geni-se.h b/include/linux/qcom-geni-se.h
index dd46494..737e713 100644
--- a/include/linux/qcom-geni-se.h
+++ b/include/linux/qcom-geni-se.h
@@ -24,6 +24,7 @@ enum geni_se_protocol_type {
struct geni_wrapper;
struct clk;
+struct opp_table;
/**
* struct geni_se - GENI Serial Engine
@@ -39,6 +40,7 @@ struct geni_se {
struct device *dev;
struct geni_wrapper *wrapper;
struct clk *clk;
+ struct opp_table *opp;
unsigned int num_clk_levels;
unsigned long *clk_perf_tbl;
};
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2020-04-17 14:05 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-17 14:04 [PATCH v2 00/17] DVFS for IO devices on sdm845 and sc7180 Rajendra Nayak
2020-04-17 14:04 ` Rajendra Nayak [this message]
2020-04-17 18:00 ` [PATCH v2 01/17] tty: serial: qcom_geni_serial: Use OPP API to set clk/perf state Matthias Kaehlcke
2020-04-18 8:05 ` Rajendra Nayak
2020-04-22 9:22 ` Rajendra Nayak
2020-04-23 13:51 ` Greg Kroah-Hartman
2020-04-17 14:04 ` [PATCH v2 02/17] spi: spi-geni-qcom: " Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 03/17] arm64: dts: sdm845: Add OPP table for all qup devices Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 04/17] arm64: dts: sc7180: " Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 05/17] drm/msm/dpu: Use OPP API to set clk/perf state Rajendra Nayak
2020-04-17 18:17 ` Matthias Kaehlcke
2020-04-18 8:12 ` Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 06/17] drm/msm: dsi: " Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 07/17] arm64: dts: sdm845: Add DSI and MDP OPP tables and power-domains Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 08/17] arm64: dts: sc7180: " Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 09/17] mmc: sdhci-msm: Use OPP API to set clk/perf state Rajendra Nayak
2020-04-20 8:13 ` Ulf Hansson
2020-04-17 14:04 ` [PATCH v2 10/17] arm64: dts: sdm845: Add sdhc opps and power-domains Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 11/17] arm64: dts: sc7180: " Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 12/17] media: venus: core: Add support for opp tables/perf voting Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 13/17] arm64: dts: sdm845: Add OPP tables and power-domains for venus Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 14/17] arm64: dts: sc7180: " Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 15/17] spi: spi-qcom-qspi: Use OPP API to set clk/perf state Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 16/17] arm64: dts: sdm845: Add qspi opps and power-domains Rajendra Nayak
2020-04-17 14:04 ` [PATCH v2 17/17] arm64: dts: sc7180: " Rajendra Nayak
2020-04-20 3:36 ` [PATCH v2 00/17] DVFS for IO devices on sdm845 and sc7180 Viresh Kumar
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