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From: peng.fan@nxp.com
To: shawnguo@kernel.org, s.hauer@pengutronix.de,
	leonard.crestez@nxp.com, abel.vesa@nxp.com, aisheng.dong@nxp.com
Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
	Anson.Huang@nxp.com, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, Peng Fan <peng.fan@nxp.com>
Subject: [PATCH V3 10/10] clk: imx8mp: mark memrepair clock as critical
Date: Thu,  7 May 2020 13:56:19 +0800	[thread overview]
Message-ID: <1588830979-11586-11-git-send-email-peng.fan@nxp.com> (raw)
In-Reply-To: <1588830979-11586-1-git-send-email-peng.fan@nxp.com>

From: Peng Fan <peng.fan@nxp.com>

If memrepair root clock in CCM is disabled, the memory repair logic
in HDMIMIX can’t work. So let's mark it as critical clock.

Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/clk/imx/clk-imx8mp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index b4d9db9d5bf1..a7c59d7a40de 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -590,7 +590,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
 	hws[IMX8MP_CLK_VPU_G2] = imx8m_clk_hw_composite("vpu_g2", imx8mp_vpu_g2_sels, ccm_base + 0xa180);
 	hws[IMX8MP_CLK_CAN1] = imx8m_clk_hw_composite("can1", imx8mp_can1_sels, ccm_base + 0xa200);
 	hws[IMX8MP_CLK_CAN2] = imx8m_clk_hw_composite("can2", imx8mp_can2_sels, ccm_base + 0xa280);
-	hws[IMX8MP_CLK_MEMREPAIR] = imx8m_clk_hw_composite("memrepair", imx8mp_memrepair_sels, ccm_base + 0xa300);
+	hws[IMX8MP_CLK_MEMREPAIR] = imx8m_clk_hw_composite_critical("memrepair", imx8mp_memrepair_sels, ccm_base + 0xa300);
 	hws[IMX8MP_CLK_PCIE_PHY] = imx8m_clk_hw_composite("pcie_phy", imx8mp_pcie_phy_sels, ccm_base + 0xa380);
 	hws[IMX8MP_CLK_PCIE_AUX] = imx8m_clk_hw_composite("pcie_aux", imx8mp_pcie_aux_sels, ccm_base + 0xa400);
 	hws[IMX8MP_CLK_I2C5] = imx8m_clk_hw_composite("i2c5", imx8mp_i2c5_sels, ccm_base + 0xa480);
-- 
2.16.4


  parent reply	other threads:[~2020-05-07  6:06 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-07  5:56 [PATCH V3 00/10] clk: imx: fixes and improve for i.MX8M peng.fan
2020-05-07  5:56 ` [PATCH V3 01/10] arm64: dts: imx8m: assign clocks for A53 peng.fan
2020-05-07  5:56 ` [PATCH V3 02/10] clk: imx8m: drop clk_hw_set_parent " peng.fan
2020-05-07  5:56 ` [PATCH V3 03/10] clk: imx: imx8mp: fix pll mux bit peng.fan
2020-05-07  5:56 ` [PATCH V3 04/10] clk: imx8mp: Define gates for pll1/2 fixed dividers peng.fan
2020-05-07  5:56 ` [PATCH V3 05/10] clk: imx8mp: use imx8m_clk_hw_composite_core to simplify code peng.fan
2020-05-07  5:56 ` [PATCH V3 06/10] clk: imx8m: migrate A53 clk root to use composite core peng.fan
2020-05-07  5:56 ` [PATCH V3 07/10] clk: imx: add mux ops for i.MX8M composite clk peng.fan
2020-05-07  5:56 ` [PATCH V3 08/10] clk: imx: add imx8m_clk_hw_composite_bus peng.fan
2020-05-07  5:56 ` [PATCH V3 09/10] clk: imx: use imx8m_clk_hw_composite_bus for i.MX8M bus clk slice peng.fan
2020-05-07  5:56 ` peng.fan [this message]
2020-05-07  6:59   ` [PATCH V3 10/10] clk: imx8mp: mark memrepair clock as critical Aisheng Dong
2020-05-07  7:59     ` Peng Fan
2020-05-07  6:58 ` [PATCH V3 00/10] clk: imx: fixes and improve for i.MX8M Aisheng Dong
2020-05-20  1:27 ` Shawn Guo

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