From: Jishnu Prakash <jprakash@codeaurora.org>
To: agross@kernel.org, bjorn.andersson@linaro.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
mka@chromium.org, linus.walleij@linaro.org,
Jonathan.Cameron@huawei.com, andy.shevchenko@gmail.com,
amit.kucheria@verdurent.com, smohanad@codeaurora.org,
kgunda@codeaurora.org, aghayal@codeaurora.org,
Jonathan Cameron <jic23@kernel.org>,
Hartmut Knaack <knaack.h@gmx.de>,
Lars-Peter Clausen <lars@metafoo.de>,
Peter Meerwald-Stadler <pmeerw@pmeerw.net>,
linux-arm-msm@vger.kernel.org, linux-iio@vger.kernel.org
Cc: linux-arm-msm-owner@vger.kernel.org,
Jishnu Prakash <jprakash@codeaurora.org>
Subject: [PATCH V6 5/7] iio: adc: Update return value checks
Date: Thu, 28 May 2020 22:24:27 +0530 [thread overview]
Message-ID: <1590684869-15400-6-git-send-email-jprakash@codeaurora.org> (raw)
In-Reply-To: <1590684869-15400-1-git-send-email-jprakash@codeaurora.org>
Clean up some return value checks to make code more compact.
Signed-off-by: Jishnu Prakash <jprakash@codeaurora.org>
---
drivers/iio/adc/qcom-spmi-adc5.c | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/iio/adc/qcom-spmi-adc5.c b/drivers/iio/adc/qcom-spmi-adc5.c
index dcc7599..3022313 100644
--- a/drivers/iio/adc/qcom-spmi-adc5.c
+++ b/drivers/iio/adc/qcom-spmi-adc5.c
@@ -301,7 +301,7 @@ static int adc5_configure(struct adc5_chip *adc,
/* Read registers 0x42 through 0x46 */
ret = adc5_read(adc, ADC5_USR_DIG_PARAM, buf, sizeof(buf));
- if (ret < 0)
+ if (ret)
return ret;
/* Digital param selection */
@@ -388,7 +388,7 @@ static int adc5_do_conversion(struct adc5_chip *adc,
if (adc->poll_eoc) {
ret = adc5_poll_wait_eoc(adc);
- if (ret < 0) {
+ if (ret) {
pr_err("EOC bit not set\n");
goto unlock;
}
@@ -398,7 +398,7 @@ static int adc5_do_conversion(struct adc5_chip *adc,
if (!ret) {
pr_debug("Did not get completion timeout.\n");
ret = adc5_poll_wait_eoc(adc);
- if (ret < 0) {
+ if (ret) {
pr_err("EOC bit not set\n");
goto unlock;
}
@@ -516,8 +516,6 @@ static int adc5_read_raw(struct iio_dev *indio_dev,
default:
return -EINVAL;
}
-
- return 0;
}
static int adc7_read_raw(struct iio_dev *indio_dev,
@@ -761,7 +759,7 @@ static int adc5_get_dt_channel_data(struct adc5_chip *adc,
ret = adc5_read(adc, ADC5_USR_REVISION1, dig_version,
sizeof(dig_version));
- if (ret < 0) {
+ if (ret) {
dev_err(dev, "Invalid dig version read %d\n", ret);
return ret;
}
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2020-05-28 16:56 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-28 16:54 [PATCH V6 0/7] iio: adc: Add support for QCOM SPMI PMIC7 ADC Jishnu Prakash
2020-05-28 16:54 ` [PATCH V6 1/7] iio: adc: Convert the QCOM SPMI ADC bindings to .yaml format Jishnu Prakash
2020-05-31 10:36 ` Jonathan Cameron
2020-05-31 10:44 ` Jonathan Cameron
2020-05-28 16:54 ` [PATCH V6 2/7] iio: adc: Add PMIC7 ADC bindings Jishnu Prakash
2020-05-31 10:45 ` Jonathan Cameron
2020-05-28 16:54 ` [PATCH V6 3/7] iio: adc: Add info property under adc_data Jishnu Prakash
2020-05-31 10:48 ` Jonathan Cameron
2020-05-28 16:54 ` [PATCH V6 4/7] iio: adc: Add support for PMIC7 ADC Jishnu Prakash
2020-05-31 10:47 ` Jonathan Cameron
2020-05-28 16:54 ` Jishnu Prakash [this message]
2020-05-31 10:49 ` [PATCH V6 5/7] iio: adc: Update return value checks Jonathan Cameron
2020-05-28 16:54 ` [PATCH V6 6/7] iio: adc: Update debug prints Jishnu Prakash
2020-05-31 10:53 ` Jonathan Cameron
2020-05-28 16:54 ` [PATCH V6 7/7] iio: adc: Add a common read function for PMIC5 and PMIC7 Jishnu Prakash
2020-05-31 10:52 ` Jonathan Cameron
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