From: Yong Wu <yong.wu@mediatek.com>
To: Pi-Hsun Shih <pihsun@chromium.org>
Cc: "Joerg Roedel" <joro@8bytes.org>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Robin Murphy" <robin.murphy@arm.com>,
"Will Deacon" <will@kernel.org>,
"Evan Green" <evgreen@chromium.org>,
"Tomasz Figa" <tfiga@google.com>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@lists.infradead.org>,
srv_heupstream@mediatek.com,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
"open list" <linux-kernel@vger.kernel.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-arm-kernel@lists.infradead.org>,
iommu@lists.linux-foundation.org,
"Youlin Pei (裴友林)" <youlin.pei@mediatek.com>,
"Nicolas Boichat" <drinkcat@chromium.org>,
anan.sun@mediatek.com, cui.zhang@mediatek.com,
chao.hao@mediatek.com, ming-fan.chen@mediatek.com
Subject: Re: [PATCH 04/21] dt-binding: mediatek: Add binding for mt8192 IOMMU and SMI
Date: Mon, 13 Jul 2020 14:54:59 +0800 [thread overview]
Message-ID: <1594623299.16172.29.camel@mhfsdcap03> (raw)
In-Reply-To: <CANdKZ0cGNy7ckzD_NAOV613o62WHdYazRRM-J8jY2-4mx_sNDA@mail.gmail.com>
On Mon, 2020-07-13 at 13:36 +0800, Pi-Hsun Shih wrote:
> On Sat, Jul 11, 2020 at 2:50 PM Yong Wu <yong.wu@mediatek.com> wrote:
> >
> > This patch adds decriptions for mt8192 IOMMU and SMI.
> >
> > mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
> > table format. The M4U-SMI HW diagram is as below:
> >
> > EMI
> > |
> > M4U
> > |
> > ------------
> > SMI Common
> > ------------
> > |
> > +-------+------+------+----------------------+-------+
> > | | | | ...... | |
> > | | | | | |
> > larb0 larb1 larb2 larb4 ...... larb19 larb20
> > disp0 disp1 mdp vdec IPE IPE
> >
> > All the connections are HW fixed, SW can NOT adjust it.
> >
> > mt8192 M4U support 0~16GB iova range. we preassign different engines
> > into different iova ranges:
> >
> > domain-id module iova-range larbs
> > 0 disp 0 ~ 4G larb0/1
> > 1 vcodec 4G ~ 8G larb4/5/7
> > 2 cam/mdp 8G ~ 12G larb2/9/11/13/14/16/17/18/19/20
> > 3 CCU0 0x4000_0000 ~ 0x43ff_ffff larb13: port 9/10
> > 4 CCU1 0x4400_0000 ~ 0x47ff_ffff larb14: port 4/5
> >
> > The iova range for CCU0/1(camera control unit) is HW requirement.
> >
> > Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> > ---
> > .../bindings/iommu/mediatek,iommu.txt | 8 +-
> > .../mediatek,smi-common.txt | 5 +-
> > .../memory-controllers/mediatek,smi-larb.txt | 3 +-
> > include/dt-bindings/memory/mt8192-larb-port.h | 237 ++++++++++++++++++
> > 4 files changed, 247 insertions(+), 6 deletions(-)
> > create mode 100644 include/dt-bindings/memory/mt8192-larb-port.h
> > ...
> > diff --git a/include/dt-bindings/memory/mt8192-larb-port.h b/include/dt-bindings/memory/mt8192-larb-port.h
> > new file mode 100644
> > index 000000000000..fbe0d5d50f1c
> > --- /dev/null
> > +++ b/include/dt-bindings/memory/mt8192-larb-port.h
> > ...
> > +/* larb7 */
> > +#define M4U_PORT_L7_VENC_RCPU MTK_M4U_DOM_ID(1, 7, 0)
> > +#define M4U_PORT_L7_VENC_REC MTK_M4U_DOM_ID(1, 7, 1)
> > +#define M4U_PORT_L7_VENC_BSDMA MTK_M4U_DOM_ID(1, 7, 2)
> > +#define M4U_PORT_L7_VENC_SV_COMV MTK_M4U_DOM_ID(1, 7, 3)
> > +#define M4U_PORT_L7_VENC_RD_COMV MTK_M4U_DOM_ID(1, 7, 4)
> > +#define M4U_PORT_L7_VENC_CUR_LUMA MTK_M4U_DOM_ID(1, 7, 5)
> > +#define M4U_PORT_L7_VENC_CUR_CHROMA MTK_M4U_DOM_ID(1, 7, 6)
> > +#define M4U_PORT_L7_VENC_REF_LUMA MTK_M4U_DOM_ID(1, 7, 7)
> > +#define M4U_PORT_L7_VENC_REF_CHROMA MTK_M4U_DOM_ID(1, 7, 8)
> > +#define M4U_PORT_L7_JPGENC_Y_RDMA MTK_M4U_DOM_ID(1, 7, 9)
> > +#define M4U_PORT_L7_JPGENC_Q_RDMA MTK_M4U_DOM_ID(1, 7, 10)
> > +#define M4U_PORT_L7_JPGENC_C_TABLE MTK_M4U_DOM_ID(1, 7, 11)
> > +#define M4U_PORT_L7_JPGENC_BSDMA MTK_M4U_DOM_ID(1, 7, 12)
> > +#define M4U_PORT_L7_VENC_SUB_R_LUMA MTK_M4U_DOM_ID(1, 7, 13)
> > +#define M4U_PORT_L7_VENC_SUB_W_LUMA MTK_M4U_DOM_ID(1, 7, 14)
> > +
>
> Small nit, /* larb8: null */ is missing here.
oh. Yes. Thanks.
I will add it in next version.
>
> > +/* larb9 */
> > +#define M4U_PORT_L9_IMG_IMGI_D1 MTK_M4U_DOM_ID(2, 9, 0)
> > +#define M4U_PORT_L9_IMG_IMGBI_D1 MTK_M4U_DOM_ID(2, 9, 1)
> > +#define M4U_PORT_L9_IMG_DMGI_D1 MTK_M4U_DOM_ID(2, 9, 2)
> > +#define M4U_PORT_L9_IMG_DEPI_D1 MTK_M4U_DOM_ID(2, 9, 3)
> > +#define M4U_PORT_L9_IMG_ICE_D1 MTK_M4U_DOM_ID(2, 9, 4)
> > +#define M4U_PORT_L9_IMG_SMTI_D1 MTK_M4U_DOM_ID(2, 9, 5)
> > +#define M4U_PORT_L9_IMG_SMTO_D2 MTK_M4U_DOM_ID(2, 9, 6)
> > +#define M4U_PORT_L9_IMG_SMTO_D1 MTK_M4U_DOM_ID(2, 9, 7)
> > +#define M4U_PORT_L9_IMG_CRZO_D1 MTK_M4U_DOM_ID(2, 9, 8)
> > +#define M4U_PORT_L9_IMG_IMG3O_D1 MTK_M4U_DOM_ID(2, 9, 9)
> > +#define M4U_PORT_L9_IMG_VIPI_D1 MTK_M4U_DOM_ID(2, 9, 10)
> > +#define M4U_PORT_L9_IMG_SMTI_D5 MTK_M4U_DOM_ID(2, 9, 11)
> > +#define M4U_PORT_L9_IMG_TIMGO_D1 MTK_M4U_DOM_ID(2, 9, 12)
> > +#define M4U_PORT_L9_IMG_UFBC_W0 MTK_M4U_DOM_ID(2, 9, 13)
> > +#define M4U_PORT_L9_IMG_UFBC_R0 MTK_M4U_DOM_ID(2, 9, 14)
> > +
> > ...
next prev parent reply other threads:[~2020-07-13 6:56 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-11 6:48 [PATCH 00/21] MT8192 IOMMU support Yong Wu
2020-07-11 6:48 ` [PATCH 01/21] dt-binding: memory: mediatek: Add a common larb-port header file Yong Wu
2020-07-12 18:06 ` Matthias Brugger
2020-07-13 5:43 ` Pi-Hsun Shih
2020-07-13 6:28 ` Yong Wu
2020-07-20 22:58 ` Rob Herring
2020-07-11 6:48 ` [PATCH 02/21] dt-binding: memory: mediatek: Extend LARB_NR_MAX to 32 Yong Wu
2020-07-20 22:59 ` Rob Herring
2020-07-11 6:48 ` [PATCH 03/21] dt-binding: memory: mediatek: Add domain definition Yong Wu
2020-07-11 6:48 ` [PATCH 04/21] dt-binding: mediatek: Add binding for mt8192 IOMMU and SMI Yong Wu
2020-07-13 5:36 ` Pi-Hsun Shih
2020-07-13 6:54 ` Yong Wu [this message]
2020-07-20 23:16 ` Rob Herring
2020-07-21 3:27 ` Yong Wu
2020-07-11 6:48 ` [PATCH 05/21] iommu/mediatek: Use the common mtk-smi-larb-port.h Yong Wu
2020-07-11 6:48 ` [PATCH 06/21] iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap Yong Wu
2020-07-13 0:38 ` Nicolas Boichat
2020-07-13 6:52 ` Yong Wu
2020-07-11 6:48 ` [PATCH 07/21] iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek Yong Wu
2020-07-11 6:48 ` [PATCH 08/21] iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros Yong Wu
2020-07-11 6:48 ` [PATCH 09/21] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek Yong Wu
2020-07-11 6:48 ` [PATCH 10/21] iommu/mediatek: Add device link for smi-common and m4u Yong Wu
2020-07-11 6:48 ` [PATCH 11/21] iommu/mediatek: Add power-domain operation Yong Wu
2020-07-13 7:03 ` Pi-Hsun Shih
2020-07-14 9:33 ` Yong Wu
2020-07-27 8:49 ` chao hao
2020-08-07 2:13 ` Yong Wu
2020-07-11 6:48 ` [PATCH 12/21] iommu/mediatek: Add iova reserved function Yong Wu
2020-07-13 7:33 ` Pi-Hsun Shih
2020-07-14 9:32 ` Yong Wu
2020-07-11 6:48 ` [PATCH 13/21] iommu/mediatek: Make MTK_IOMMU depend on ARM64 Yong Wu
2020-07-11 6:48 ` [PATCH 14/21] iommu/mediatek: Add single domain Yong Wu
2020-07-11 6:48 ` [PATCH 15/21] iommu/mediatek: Support master use iova over 32bit Yong Wu
2020-07-11 6:48 ` [PATCH 16/21] iommu/mediatek: Support up to 34bit iova in tlb invalid Yong Wu
2020-07-11 6:48 ` [PATCH 17/21] iommu/mediatek: Support report iova 34bit translation fault in ISR Yong Wu
2020-07-11 6:48 ` [PATCH 18/21] iommu/mediatek: Add support for multi domain Yong Wu
2020-07-23 20:47 ` Rob Herring
2020-07-27 6:41 ` Yong Wu
2020-07-11 6:48 ` [PATCH 19/21] iommu/mediatek: Adjust the structure Yong Wu
2020-07-11 6:48 ` [PATCH 20/21] iommu/mediatek: Add mt8192 support Yong Wu
2020-07-11 6:48 ` [PATCH 21/21] memory: mtk-smi: " Yong Wu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1594623299.16172.29.camel@mhfsdcap03 \
--to=yong.wu@mediatek.com \
--cc=anan.sun@mediatek.com \
--cc=chao.hao@mediatek.com \
--cc=cui.zhang@mediatek.com \
--cc=devicetree@vger.kernel.org \
--cc=drinkcat@chromium.org \
--cc=evgreen@chromium.org \
--cc=iommu@lists.linux-foundation.org \
--cc=joro@8bytes.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=matthias.bgg@gmail.com \
--cc=ming-fan.chen@mediatek.com \
--cc=pihsun@chromium.org \
--cc=robh+dt@kernel.org \
--cc=robin.murphy@arm.com \
--cc=srv_heupstream@mediatek.com \
--cc=tfiga@google.com \
--cc=will@kernel.org \
--cc=youlin.pei@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).