From: Rajendra Nayak <rnayak@codeaurora.org>
To: stanimir.varbanov@linaro.org, robh+dt@kernel.org,
agross@kernel.org, bjorn.andersson@linaro.org
Cc: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
mka@chromium.org, Rajendra Nayak <rnayak@codeaurora.org>
Subject: [PATCH v2 4/4] arm64: dts: sc7180: Add OPP tables and power-domains for venus
Date: Thu, 16 Jul 2020 11:12:19 +0530 [thread overview]
Message-ID: <1594878139-3402-5-git-send-email-rnayak@codeaurora.org> (raw)
In-Reply-To: <1594878139-3402-1-git-send-email-rnayak@codeaurora.org>
Add the OPP tables in order to be able to vote on the performance state
of a power-domain
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 35 +++++++++++++++++++++++++++++++++--
1 file changed, 33 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 126e2fc..c560ad2 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -2664,8 +2664,10 @@
reg = <0 0x0aa00000 0 0xff000>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&videocc VENUS_GDSC>,
- <&videocc VCODEC0_GDSC>;
- power-domain-names = "venus", "vcodec0";
+ <&videocc VCODEC0_GDSC>,
+ <&rpmhpd SC7180_CX>;
+ power-domain-names = "venus", "vcodec0", "opp-pd";
+ operating-points-v2 = <&venus_opp_table>;
clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
<&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
@@ -2686,6 +2688,35 @@
video-encoder {
compatible = "venus-encoder";
};
+
+ venus_opp_table: venus-opp-table {
+ compatible = "operating-points-v2";
+
+ opp-150000000 {
+ opp-hz = /bits/ 64 <150000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-270000000 {
+ opp-hz = /bits/ 64 <270000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ };
+
+ opp-340000000 {
+ opp-hz = /bits/ 64 <340000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-434000000 {
+ opp-hz = /bits/ 64 <434000000>;
+ required-opps = <&rpmhpd_opp_nom>;
+ };
+
+ opp-500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ required-opps = <&rpmhpd_opp_turbo>;
+ };
+ };
};
videocc: clock-controller@ab00000 {
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
prev parent reply other threads:[~2020-07-16 5:46 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-16 5:42 [PATCH v2 0/4] DVFS support for Venus Rajendra Nayak
2020-07-16 5:42 ` [PATCH v2 1/4] dt-bindings: media: venus: Add an optional power domain for perf voting Rajendra Nayak
2020-07-16 19:59 ` Rob Herring
2020-07-17 5:52 ` Rajendra Nayak
2020-07-17 18:56 ` Rob Herring
2020-07-20 4:29 ` Rajendra Nayak
2020-07-16 23:43 ` Bjorn Andersson
2020-07-17 5:13 ` Rajendra Nayak
2020-07-16 5:42 ` [PATCH v2 2/4] media: venus: core: Add support for opp tables/perf voting Rajendra Nayak
2020-07-16 5:42 ` [PATCH v2 3/4] arm64: dts: sdm845: Add OPP tables and power-domains for venus Rajendra Nayak
2020-07-16 5:42 ` Rajendra Nayak [this message]
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