From: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>,
Ryder Lee <ryder.lee@mediatek.com>,
Bjorn Helgaas <bhelgaas@google.com>, <linux-pci@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <yong.wu@mediatek.com>,
<jianjun.wang@mediatek.com>
Subject: Re: [PATCH v4 0/4] Split PCIe node to comply with hardware design
Date: Mon, 3 Aug 2020 15:46:12 +0800 [thread overview]
Message-ID: <1596440772.7361.35.camel@mhfsdcap03> (raw)
In-Reply-To: <20200721074915.14516-1-Chuanjia.Liu@mediatek.com>
On Tue, 2020-07-21 at 15:49 +0800, chuanjia.liu wrote:
> There are two independent PCIe controllers in MT2712 and MT7622
> platform, and each of them should contain an independent MSI
> domain.
>
> In current architecture, MSI domain will be inherited from the
> root bridge, and all of the devices will share the same MSI domain.
> Hence that, the PCIe devices will not work properly if the irq
> number which required is more than 32.
>
> Split the PCIe node for MT2712 and MT7622 platform to fix MSI
> issue and comply with the hardware design.
Hi Lorenzo,
gentle ping for this patchset.
BTW. I don't see it in [1],but is ok in [2], I don't know why.
[1]https://lore.kernel.org/linux-pci/
[2]https://lore.kernel.org/linux-arm-kernel/20200721074915.14516-1-Chuanjia.Liu@mediatek.com/
Best Regards,
Chuanjia
>
> change note:
> v4:change commit message due to bayes statistical bogofilter
> considers this series patch SPAM.
> v3:rebase for 5.8-rc1. Only collect ack of Ryder, No code change.
> v2:change the allocation of MT2712 PCIe MMIO space due to the
> allocation size is not right in v1.
>
> chuanjia.liu (4):
> dt-bindings: pci: mediatek: Modified the Device tree bindings
> PCI: mediatek: Use regmap to get shared pcie-cfg base
> arm64: dts: mediatek: Split PCIe node for MT2712 and MT7622
> ARM: dts: mediatek: Modified MT7629 PCIe node
>
> .../bindings/pci/mediatek-pcie-cfg.yaml | 38 +++++
> .../devicetree/bindings/pci/mediatek-pcie.txt | 144 +++++++++++-------
> arch/arm/boot/dts/mt7629-rfb.dts | 3 +-
> arch/arm/boot/dts/mt7629.dtsi | 23 +--
> arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 75 +++++----
> .../dts/mediatek/mt7622-bananapi-bpi-r64.dts | 16 +-
> arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 6 +-
> arch/arm64/boot/dts/mediatek/mt7622.dtsi | 68 ++++++---
> drivers/pci/controller/pcie-mediatek.c | 25 ++-
> 9 files changed, 258 insertions(+), 140 deletions(-)
> create mode 100644 .../bindings/pci/mediatek-pcie-cfg.yaml
>
next parent reply other threads:[~2020-08-03 7:47 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20200721074915.14516-1-Chuanjia.Liu@mediatek.com>
2020-08-03 7:46 ` Chuanjia Liu [this message]
2020-09-08 6:13 ` Aw: Re: [PATCH v4 0/4] Split PCIe node to comply with hardware design Frank Wunderlich
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