* [PATCH v2 0/3] Add board support for HK10 board variants
@ 2020-08-06 9:32 Gokul Sriram Palanisamy
2020-08-06 9:32 ` [PATCH v2 1/3] dt-bindings: qcom: Add ipq8074 bindings Gokul Sriram Palanisamy
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Gokul Sriram Palanisamy @ 2020-08-06 9:32 UTC (permalink / raw)
To: agross, bjorn.andersson, robh+dt, sboyd, linux-arm-msm,
devicetree, linux-kernel
Cc: sricharan, gokulsri
Added support for HK10-C1 and HK10-C2 board variants based on IPQ8074 SoC.
Both these variants support dual QCN9000 PCIe cards that uses MHI communication
protocol over PCIe. In addition, HK10-C1 support on-chip radio.
Both these variants slightly differ in clock configuation for ethernet.
This series depends on below series:
[V2,0/7] Add PCIe support for IPQ8074
[v7,0/9] remoteproc: qcom: q6v5-wcss: Add support for secure pil
Gokul Sriram Palanisamy (3):
dt-bindings: qcom: Add ipq8074 bindings
arm64: dts: Add board support for HK10
arm64: dts: Enabled mhi device over PCIe
Documentation/devicetree/bindings/arm/qcom.yaml | 4 +
arch/arm64/boot/dts/qcom/Makefile | 2 +
arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dts | 11 ++
arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dts | 14 +++
arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi | 134 ++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 8 ++
6 files changed, 173 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dts
create mode 100644 arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dts
create mode 100644 arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi
--
2.7.4
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH v2 1/3] dt-bindings: qcom: Add ipq8074 bindings 2020-08-06 9:32 [PATCH v2 0/3] Add board support for HK10 board variants Gokul Sriram Palanisamy @ 2020-08-06 9:32 ` Gokul Sriram Palanisamy 2020-08-12 20:07 ` Rob Herring 2020-08-06 9:32 ` [PATCH v2 2/3] arm64: dts: Add board support for HK10 Gokul Sriram Palanisamy 2020-08-06 9:32 ` [PATCH v2 3/3] arm64: dts: Enabled MHI device over PCIe Gokul Sriram Palanisamy 2 siblings, 1 reply; 7+ messages in thread From: Gokul Sriram Palanisamy @ 2020-08-06 9:32 UTC (permalink / raw) To: agross, bjorn.andersson, robh+dt, sboyd, linux-arm-msm, devicetree, linux-kernel Cc: sricharan, gokulsri Document the new device-tree bindings for boards HK10-C1 and HK10-C2 based on ipq8074 SoC. Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org> --- Documentation/devicetree/bindings/arm/qcom.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 6031aee..7b294be 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -47,6 +47,8 @@ description: | cp01-c1 dragonboard hk01 + hk10-c1 + hk10-c2 idp liquid mtp @@ -148,6 +150,8 @@ properties: - items: - enum: - qcom,ipq8074-hk01 + - qcom,ipq8074-hk10-c1 + - qcom,ipq8074-hk10-c2 - const: qcom,ipq8074 - items: -- 2.7.4 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v2 1/3] dt-bindings: qcom: Add ipq8074 bindings 2020-08-06 9:32 ` [PATCH v2 1/3] dt-bindings: qcom: Add ipq8074 bindings Gokul Sriram Palanisamy @ 2020-08-12 20:07 ` Rob Herring 0 siblings, 0 replies; 7+ messages in thread From: Rob Herring @ 2020-08-12 20:07 UTC (permalink / raw) To: Gokul Sriram Palanisamy Cc: agross, robh+dt, linux-kernel, bjorn.andersson, sricharan, linux-arm-msm, devicetree, sboyd On Thu, 06 Aug 2020 15:02:10 +0530, Gokul Sriram Palanisamy wrote: > Document the new device-tree bindings for boards > HK10-C1 and HK10-C2 based on ipq8074 SoC. > > Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org> > --- > Documentation/devicetree/bindings/arm/qcom.yaml | 4 ++++ > 1 file changed, 4 insertions(+) > Acked-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2 2/3] arm64: dts: Add board support for HK10 2020-08-06 9:32 [PATCH v2 0/3] Add board support for HK10 board variants Gokul Sriram Palanisamy 2020-08-06 9:32 ` [PATCH v2 1/3] dt-bindings: qcom: Add ipq8074 bindings Gokul Sriram Palanisamy @ 2020-08-06 9:32 ` Gokul Sriram Palanisamy 2020-08-06 9:32 ` [PATCH v2 3/3] arm64: dts: Enabled MHI device over PCIe Gokul Sriram Palanisamy 2 siblings, 0 replies; 7+ messages in thread From: Gokul Sriram Palanisamy @ 2020-08-06 9:32 UTC (permalink / raw) To: agross, bjorn.andersson, robh+dt, sboyd, linux-arm-msm, devicetree, linux-kernel Cc: sricharan, gokulsri Add initial support for IPQ8074 SoC based HK10-C1 and HK10-C2 evaluation boards. Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org> --- arch/arm64/boot/dts/qcom/Makefile | 2 + arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dts | 11 ++++ arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dts | 14 +++++ arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi | 76 ++++++++++++++++++++++++++++ 4 files changed, 103 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dts create mode 100644 arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dts create mode 100644 arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index c98bafe..ea933fb 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -4,6 +4,8 @@ dtb-$(CONFIG_ARCH_QCOM) += apq8096-db820c.dtb dtb-$(CONFIG_ARCH_QCOM) += apq8096-ifc6640.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq6018-cp01-c1.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk01.dtb +dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk10-c1.dtb +dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk10-c2.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8916-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8916-longcheer-l8150.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-a3u-eur.dtb diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dts b/arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dts new file mode 100644 index 0000000..2bfcf42 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (c) 2020 The Linux Foundation. All rights reserved. + */ +/dts-v1/; + +#include "ipq8074-hk10.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. IPQ8074/AP-HK10-C1"; + compatible = "qcom,ipq8074-hk10-c1", "qcom,ipq8074"; +}; diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dts b/arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dts new file mode 100644 index 0000000..1897e96 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0-only +/dts-v1/; +/* Copyright (c) 2020 The Linux Foundation. All rights reserved. + */ +#include "ipq8074-hk10.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. IPQ8074/AP-HK10-C2"; + compatible = "qcom,ipq8074-hk10-c2", "qcom,ipq8074"; +}; + +&q6v5_wcss { + status = "disabled"; +}; diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi b/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi new file mode 100644 index 0000000..0827055 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi @@ -0,0 +1,76 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ +/dts-v1/; + +#include "ipq8074.dtsi" + +/ { + #address-cells = <0x2>; + #size-cells = <0x2>; + + interrupt-parent = <&intc>; + + aliases { + serial0 = &blsp1_uart5; + }; + + chosen { + stdout-path = "serial0"; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x40000000 0x0 0x20000000>; + }; +}; + +&blsp1_spi1 { + status = "ok"; + + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + }; +}; + +&blsp1_uart5 { + status = "ok"; +}; + +&pcie0 { + status = "ok"; + perst-gpio = <&tlmm 58 0x1>; +}; + +&pcie1 { + status = "ok"; + perst-gpio = <&tlmm 61 0x1>; +}; + +&qmp_pcie_phy0 { + status = "ok"; +}; + +&qmp_pcie_phy1 { + status = "ok"; +}; + +&qpic_bam { + status = "ok"; +}; + +&qpic_nand { + status = "ok"; + + nand@0 { + reg = <0>; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + nand-bus-width = <8>; + }; +}; -- 2.7.4 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v2 3/3] arm64: dts: Enabled MHI device over PCIe 2020-08-06 9:32 [PATCH v2 0/3] Add board support for HK10 board variants Gokul Sriram Palanisamy 2020-08-06 9:32 ` [PATCH v2 1/3] dt-bindings: qcom: Add ipq8074 bindings Gokul Sriram Palanisamy 2020-08-06 9:32 ` [PATCH v2 2/3] arm64: dts: Add board support for HK10 Gokul Sriram Palanisamy @ 2020-08-06 9:32 ` Gokul Sriram Palanisamy 2020-08-06 10:26 ` Manivannan Sadhasivam 2 siblings, 1 reply; 7+ messages in thread From: Gokul Sriram Palanisamy @ 2020-08-06 9:32 UTC (permalink / raw) To: agross, bjorn.andersson, robh+dt, sboyd, linux-arm-msm, devicetree, linux-kernel Cc: sricharan, gokulsri Enabled MHI device support over PCIe and added memory reservation required for MHI enabled QCN9000 PCIe card. Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org> --- arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi | 58 ++++++++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/ipq8074.dtsi | 8 +++++ 2 files changed, 66 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi b/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi index 0827055..d201a7b 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi @@ -24,6 +24,22 @@ device_type = "memory"; reg = <0x0 0x40000000 0x0 0x20000000>; }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + qcn9000_pcie0: memory@50f00000 { + no-map; + reg = <0x0 0x50f00000 0x0 0x03700000>; + }; + + qcn9000_pcie1: memory@54600000 { + no-map; + reg = <0x0 0x54600000 0x0 0x03700000>; + }; + }; }; &blsp1_spi1 { @@ -74,3 +90,45 @@ nand-bus-width = <8>; }; }; + +&pcie0_rp { + status = "ok"; + + mhi_0: qcom,mhi@0 { + reg = <0 0 0 0 0 >; + qrtr_instance_id = <0x20>; + #address-cells = <0x2>; + #size-cells = <0x2>; + + base-addr = <0x50f00000>; + qcom,caldb-addr = <0x53E00000>; + qrtr_node_id = <0x27>; + mhi,max-channels = <30>; + mhi,timeout = <10000>; + + pcie0_mhi: pcie0_mhi { + status = "ok"; + }; + }; +}; + +&pcie1_rp { + status = "ok"; + + mhi_1: qcom,mhi@1 { + reg = <0 0 0 0 0 >; + qrtr_instance_id = <0x21>; + #address-cells = <0x2>; + #size-cells = <0x2>; + + base-addr = <0x54600000>; + qcom,caldb-addr = <0x57500000>; + qrtr_node_id = <0x28>; + mhi,max-channels = <30>; + mhi,timeout = <10000>; + + pcie1_mhi: pcie1_mhi { + status = "ok"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index b651345..eef47c1 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -709,6 +709,10 @@ "ahb", "axi_m_sticky"; status = "disabled"; + + pcie1_rp: pcie1_rp { + reg = <0 0 0 0 0>; + }; }; pcie0: pci@20000000 { @@ -779,6 +783,10 @@ "axi_m_sticky", "axi_s_sticky"; status = "disabled"; + + pcie0_rp: pcie0_rp { + reg = <0 0 0 0 0>; + }; }; tcsr_q6: syscon@1945000 { -- 2.7.4 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v2 3/3] arm64: dts: Enabled MHI device over PCIe 2020-08-06 9:32 ` [PATCH v2 3/3] arm64: dts: Enabled MHI device over PCIe Gokul Sriram Palanisamy @ 2020-08-06 10:26 ` Manivannan Sadhasivam 2020-09-30 11:04 ` gokulsri 0 siblings, 1 reply; 7+ messages in thread From: Manivannan Sadhasivam @ 2020-08-06 10:26 UTC (permalink / raw) To: Gokul Sriram Palanisamy Cc: agross, bjorn.andersson, robh+dt, sboyd, linux-arm-msm, devicetree, linux-kernel, sricharan On Thu, Aug 06, 2020 at 03:02:12PM +0530, Gokul Sriram Palanisamy wrote: > Enabled MHI device support over PCIe and added memory > reservation required for MHI enabled QCN9000 PCIe card. > There is no DT support exist for MHI as of now, so this is not going to work. Thanks, Mani > Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org> > --- > arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi | 58 ++++++++++++++++++++++++++++++ > arch/arm64/boot/dts/qcom/ipq8074.dtsi | 8 +++++ > 2 files changed, 66 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi b/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi > index 0827055..d201a7b 100644 > --- a/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi > @@ -24,6 +24,22 @@ > device_type = "memory"; > reg = <0x0 0x40000000 0x0 0x20000000>; > }; > + > + reserved-memory { > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + qcn9000_pcie0: memory@50f00000 { > + no-map; > + reg = <0x0 0x50f00000 0x0 0x03700000>; > + }; > + > + qcn9000_pcie1: memory@54600000 { > + no-map; > + reg = <0x0 0x54600000 0x0 0x03700000>; > + }; > + }; > }; > > &blsp1_spi1 { > @@ -74,3 +90,45 @@ > nand-bus-width = <8>; > }; > }; > + > +&pcie0_rp { > + status = "ok"; > + > + mhi_0: qcom,mhi@0 { > + reg = <0 0 0 0 0 >; > + qrtr_instance_id = <0x20>; > + #address-cells = <0x2>; > + #size-cells = <0x2>; > + > + base-addr = <0x50f00000>; > + qcom,caldb-addr = <0x53E00000>; > + qrtr_node_id = <0x27>; > + mhi,max-channels = <30>; > + mhi,timeout = <10000>; > + > + pcie0_mhi: pcie0_mhi { > + status = "ok"; > + }; > + }; > +}; > + > +&pcie1_rp { > + status = "ok"; > + > + mhi_1: qcom,mhi@1 { > + reg = <0 0 0 0 0 >; > + qrtr_instance_id = <0x21>; > + #address-cells = <0x2>; > + #size-cells = <0x2>; > + > + base-addr = <0x54600000>; > + qcom,caldb-addr = <0x57500000>; > + qrtr_node_id = <0x28>; > + mhi,max-channels = <30>; > + mhi,timeout = <10000>; > + > + pcie1_mhi: pcie1_mhi { > + status = "ok"; > + }; > + }; > +}; > diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > index b651345..eef47c1 100644 > --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > @@ -709,6 +709,10 @@ > "ahb", > "axi_m_sticky"; > status = "disabled"; > + > + pcie1_rp: pcie1_rp { > + reg = <0 0 0 0 0>; > + }; > }; > > pcie0: pci@20000000 { > @@ -779,6 +783,10 @@ > "axi_m_sticky", > "axi_s_sticky"; > status = "disabled"; > + > + pcie0_rp: pcie0_rp { > + reg = <0 0 0 0 0>; > + }; > }; > > tcsr_q6: syscon@1945000 { > -- > 2.7.4 > ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 3/3] arm64: dts: Enabled MHI device over PCIe 2020-08-06 10:26 ` Manivannan Sadhasivam @ 2020-09-30 11:04 ` gokulsri 0 siblings, 0 replies; 7+ messages in thread From: gokulsri @ 2020-09-30 11:04 UTC (permalink / raw) To: Manivannan Sadhasivam Cc: agross, bjorn.andersson, robh+dt, sboyd, linux-arm-msm, devicetree, linux-kernel, sricharan On 2020-08-06 15:56, Manivannan Sadhasivam wrote: > On Thu, Aug 06, 2020 at 03:02:12PM +0530, Gokul Sriram Palanisamy > wrote: >> Enabled MHI device support over PCIe and added memory >> reservation required for MHI enabled QCN9000 PCIe card. >> > > There is no DT support exist for MHI as of now, so this is not going to > work. > > Thanks, > Mani > Hi Mani, The dt entries are to be used by the ath11k driver. Will remove mhi,max-channels and mhi,timeout and post a new revision. Thanks, Gokul >> Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org> >> --- >> arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi | 58 >> ++++++++++++++++++++++++++++++ >> arch/arm64/boot/dts/qcom/ipq8074.dtsi | 8 +++++ >> 2 files changed, 66 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi >> b/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi >> index 0827055..d201a7b 100644 >> --- a/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi >> +++ b/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi >> @@ -24,6 +24,22 @@ >> device_type = "memory"; >> reg = <0x0 0x40000000 0x0 0x20000000>; >> }; >> + >> + reserved-memory { >> + #address-cells = <2>; >> + #size-cells = <2>; >> + ranges; >> + >> + qcn9000_pcie0: memory@50f00000 { >> + no-map; >> + reg = <0x0 0x50f00000 0x0 0x03700000>; >> + }; >> + >> + qcn9000_pcie1: memory@54600000 { >> + no-map; >> + reg = <0x0 0x54600000 0x0 0x03700000>; >> + }; >> + }; >> }; >> >> &blsp1_spi1 { >> @@ -74,3 +90,45 @@ >> nand-bus-width = <8>; >> }; >> }; >> + >> +&pcie0_rp { >> + status = "ok"; >> + >> + mhi_0: qcom,mhi@0 { >> + reg = <0 0 0 0 0 >; >> + qrtr_instance_id = <0x20>; >> + #address-cells = <0x2>; >> + #size-cells = <0x2>; >> + >> + base-addr = <0x50f00000>; >> + qcom,caldb-addr = <0x53E00000>; >> + qrtr_node_id = <0x27>; >> + mhi,max-channels = <30>; >> + mhi,timeout = <10000>; >> + >> + pcie0_mhi: pcie0_mhi { >> + status = "ok"; >> + }; >> + }; >> +}; >> + >> +&pcie1_rp { >> + status = "ok"; >> + >> + mhi_1: qcom,mhi@1 { >> + reg = <0 0 0 0 0 >; >> + qrtr_instance_id = <0x21>; >> + #address-cells = <0x2>; >> + #size-cells = <0x2>; >> + >> + base-addr = <0x54600000>; >> + qcom,caldb-addr = <0x57500000>; >> + qrtr_node_id = <0x28>; >> + mhi,max-channels = <30>; >> + mhi,timeout = <10000>; >> + >> + pcie1_mhi: pcie1_mhi { >> + status = "ok"; >> + }; >> + }; >> +}; >> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi >> b/arch/arm64/boot/dts/qcom/ipq8074.dtsi >> index b651345..eef47c1 100644 >> --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi >> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi >> @@ -709,6 +709,10 @@ >> "ahb", >> "axi_m_sticky"; >> status = "disabled"; >> + >> + pcie1_rp: pcie1_rp { >> + reg = <0 0 0 0 0>; >> + }; >> }; >> >> pcie0: pci@20000000 { >> @@ -779,6 +783,10 @@ >> "axi_m_sticky", >> "axi_s_sticky"; >> status = "disabled"; >> + >> + pcie0_rp: pcie0_rp { >> + reg = <0 0 0 0 0>; >> + }; >> }; >> >> tcsr_q6: syscon@1945000 { >> -- >> 2.7.4 >> ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2020-09-30 11:05 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2020-08-06 9:32 [PATCH v2 0/3] Add board support for HK10 board variants Gokul Sriram Palanisamy 2020-08-06 9:32 ` [PATCH v2 1/3] dt-bindings: qcom: Add ipq8074 bindings Gokul Sriram Palanisamy 2020-08-12 20:07 ` Rob Herring 2020-08-06 9:32 ` [PATCH v2 2/3] arm64: dts: Add board support for HK10 Gokul Sriram Palanisamy 2020-08-06 9:32 ` [PATCH v2 3/3] arm64: dts: Enabled MHI device over PCIe Gokul Sriram Palanisamy 2020-08-06 10:26 ` Manivannan Sadhasivam 2020-09-30 11:04 ` gokulsri
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