From: Swapnil Jakhade <sjakhade@cadence.com>
To: <airlied@linux.ie>, <daniel@ffwll.ch>,
<Laurent.pinchart@ideasonboard.com>, <robh+dt@kernel.org>,
<a.hajda@samsung.com>, <narmstrong@baylibre.com>,
<jonas@kwiboo.se>, <jernej.skrabec@siol.net>,
<dri-devel@lists.freedesktop.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Cc: <mparab@cadence.com>, <sjakhade@cadence.com>,
<yamonkar@cadence.com>, <tomi.valkeinen@ti.com>, <jsarha@ti.com>,
<nsekhar@ti.com>, <praneeth@ti.com>
Subject: [PATCH v8 1/3] dt-bindings: drm/bridge: Document Cadence MHDP bridge bindings
Date: Thu, 6 Aug 2020 13:34:30 +0200 [thread overview]
Message-ID: <1596713672-8146-2-git-send-email-sjakhade@cadence.com> (raw)
In-Reply-To: <1596713672-8146-1-git-send-email-sjakhade@cadence.com>
From: Yuti Amonkar <yamonkar@cadence.com>
Document the bindings used for the Cadence MHDP DPI/DP bridge in
yaml format.
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../bindings/display/bridge/cdns,mhdp.yaml | 139 ++++++++++++++++++
1 file changed, 139 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml
diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml
new file mode 100644
index 000000000000..dabccefe0983
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml
@@ -0,0 +1,139 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/display/bridge/cdns,mhdp.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Cadence MHDP bridge
+
+maintainers:
+ - Swapnil Jakhade <sjakhade@cadence.com>
+ - Yuti Amonkar <yamonkar@cadence.com>
+
+properties:
+ compatible:
+ enum:
+ - cdns,mhdp8546
+ - ti,j721e-mhdp8546
+
+ reg:
+ minItems: 1
+ maxItems: 2
+ items:
+ - description:
+ Register block of mhdptx apb registers up to PHY mapped area (AUX_CONFIG_P).
+ The AUX and PMA registers are not part of this range, they are instead
+ included in the associated PHY.
+ - description:
+ Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs.
+
+ reg-names:
+ minItems: 1
+ maxItems: 2
+ items:
+ - const: mhdptx
+ - const: j721e-intg
+
+ clocks:
+ maxItems: 1
+ description:
+ DP bridge clock, used by the IP to know how to translate a number of
+ clock cycles into a time (which is used to comply with DP standard timings
+ and delays).
+
+ phys:
+ maxItems: 1
+ description:
+ phandle to the DisplayPort PHY.
+
+ ports:
+ type: object
+ description:
+ Ports as described in Documentation/devicetree/bindings/graph.txt.
+
+ properties:
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+ port@0:
+ type: object
+ description:
+ Input port representing the DP bridge input.
+
+ port@1:
+ type: object
+ description:
+ Output port representing the DP bridge output.
+
+ required:
+ - port@0
+ - port@1
+ - '#address-cells'
+ - '#size-cells'
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: ti,j721e-mhdp8546
+ then:
+ properties:
+ reg:
+ minItems: 2
+ reg-names:
+ minItems: 2
+ else:
+ properties:
+ reg:
+ maxItems: 1
+ reg-names:
+ maxItems: 1
+
+required:
+ - compatible
+ - clocks
+ - reg
+ - reg-names
+ - phys
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+ bus {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ mhdp: dp-bridge@f0fb000000 {
+ compatible = "cdns,mhdp8546";
+ reg = <0xf0 0xfb000000 0x0 0x1000000>;
+ reg-names = "mhdptx";
+ clocks = <&mhdp_clock>;
+ phys = <&dp_phy>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dp_bridge_input: endpoint {
+ remote-endpoint = <&xxx_dpi_output>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dp_bridge_output: endpoint {
+ remote-endpoint = <&xxx_dp_connector_input>;
+ };
+ };
+ };
+ };
+ };
+...
--
2.26.1
next prev parent reply other threads:[~2020-08-06 16:55 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-06 11:34 [PATCH v8 0/3] drm: Add support for Cadence MHDP DPI/DP bridge and J721E wrapper Swapnil Jakhade
2020-08-06 11:34 ` Swapnil Jakhade [this message]
2020-08-11 0:36 ` [PATCH v8 1/3] dt-bindings: drm/bridge: Document Cadence MHDP bridge bindings Laurent Pinchart
2020-08-14 7:13 ` Tomi Valkeinen
2020-08-06 11:34 ` [PATCH v8 2/3] drm: bridge: Add support for Cadence MHDP DPI/DP bridge Swapnil Jakhade
2020-08-07 1:15 ` kernel test robot
2020-08-07 9:38 ` Tomi Valkeinen
2020-08-11 2:36 ` Laurent Pinchart
2020-08-14 8:22 ` Tomi Valkeinen
2020-08-24 2:17 ` Laurent Pinchart
2020-08-14 9:29 ` Tomi Valkeinen
2020-08-24 2:18 ` Laurent Pinchart
2020-08-26 7:26 ` Tomi Valkeinen
2020-08-06 11:34 ` [PATCH v8 3/3] drm: bridge: cdns-mhdp: Add j721e wrapper Swapnil Jakhade
2020-08-11 2:41 ` Laurent Pinchart
2020-08-12 8:39 ` [PATCH v8 0/3] drm: Add support for Cadence MHDP DPI/DP bridge and J721E wrapper Guido Günther
2020-08-12 10:47 ` Tomi Valkeinen
2020-08-12 13:56 ` Guido Günther
2020-08-24 7:16 ` Swapnil Kashinath Jakhade
2020-08-25 7:32 ` Guido Günther
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