From: Yongqiang Niu <yongqiang.niu@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Mark Rutland <mark.rutland@arm.com>,
<dri-devel@lists.freedesktop.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
Yongqiang Niu <yongqiang.niu@mediatek.com>
Subject: [PATCH v1 02/21] drm/mediatek: add component POSTMASK
Date: Thu, 20 Aug 2020 14:03:59 +0800 [thread overview]
Message-ID: <1597903458-8055-3-git-send-email-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <1597903458-8055-1-git-send-email-yongqiang.niu@mediatek.com>
This patch add component POSTMASK
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 31 +++++++++++++++++++++++++++++
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 +
include/linux/soc/mediatek/mtk-mmsys.h | 1 +
3 files changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index 5e97ca5..8b9fb5e 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -58,6 +58,10 @@
#define DISP_GAMMA_SIZE 0x0030
#define DISP_GAMMA_LUT 0x0700
+#define DISP_POSTMASK_EN 0x0000
+#define DISP_POSTMASK_CFG 0x0020
+#define DISP_POSTMASK_SIZE 0x0030
+
#define LUT_10BIT_MASK 0x03ff
#define OD_RELAYMODE BIT(0)
@@ -319,6 +323,24 @@ static void mtk_gamma_set(struct mtk_ddp_comp *comp,
}
}
+static void mtk_postmask_config(struct mtk_ddp_comp *comp, unsigned int w,
+ unsigned int h, unsigned int vrefresh,
+ unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
+{
+ mtk_ddp_write(cmdq_pkt, w << 16 | h, comp, DISP_POSTMASK_SIZE);
+ mtk_ddp_write(cmdq_pkt, DITHER_RELAY_MODE, comp, DISP_POSTMASK_CFG);
+}
+
+static void mtk_postmask_start(struct mtk_ddp_comp *comp)
+{
+ writel(DITHER_EN, comp->regs + DISP_POSTMASK_EN);
+}
+
+static void mtk_postmask_stop(struct mtk_ddp_comp *comp)
+{
+ writel_relaxed(0x0, comp->regs + DISP_POSTMASK_EN);
+}
+
static const struct mtk_ddp_comp_funcs ddp_aal = {
.gamma_set = mtk_gamma_set,
.config = mtk_aal_config,
@@ -346,6 +368,12 @@ static void mtk_gamma_set(struct mtk_ddp_comp *comp,
.stop = mtk_gamma_stop,
};
+static const struct mtk_ddp_comp_funcs ddp_postmask = {
+ .config = mtk_postmask_config,
+ .start = mtk_postmask_start,
+ .stop = mtk_postmask_stop,
+};
+
static const struct mtk_ddp_comp_funcs ddp_od = {
.config = mtk_od_config,
.start = mtk_od_start,
@@ -372,6 +400,7 @@ static void mtk_gamma_set(struct mtk_ddp_comp *comp,
[MTK_DISP_MUTEX] = "mutex",
[MTK_DISP_OD] = "od",
[MTK_DISP_BLS] = "bls",
+ [MTK_DISP_POSTMASK] = "postmask",
};
struct mtk_ddp_comp_match {
@@ -402,6 +431,8 @@ struct mtk_ddp_comp_match {
[DDP_COMPONENT_OVL_2L0] = { MTK_DISP_OVL_2L, 0, NULL },
[DDP_COMPONENT_OVL_2L1] = { MTK_DISP_OVL_2L, 1, NULL },
[DDP_COMPONENT_OVL_2L2] = { MTK_DISP_OVL_2L, 2, NULL },
+ [DDP_COMPONENT_POSTMASK0]
+ = { MTK_DISP_POSTMASK, 0, &ddp_postmask },
[DDP_COMPONENT_PWM0] = { MTK_DISP_PWM, 0, NULL },
[DDP_COMPONENT_PWM1] = { MTK_DISP_PWM, 1, NULL },
[DDP_COMPONENT_PWM2] = { MTK_DISP_PWM, 2, NULL },
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
index 161201f..ae11b46 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
@@ -29,6 +29,7 @@ enum mtk_ddp_comp_type {
MTK_DISP_UFOE,
MTK_DSI,
MTK_DPI,
+ MTK_DISP_POSTMASK,
MTK_DISP_PWM,
MTK_DISP_MUTEX,
MTK_DISP_OD,
diff --git a/include/linux/soc/mediatek/mtk-mmsys.h b/include/linux/soc/mediatek/mtk-mmsys.h
index 268d95a..cc22c3e 100644
--- a/include/linux/soc/mediatek/mtk-mmsys.h
+++ b/include/linux/soc/mediatek/mtk-mmsys.h
@@ -31,6 +31,7 @@ enum mtk_ddp_comp_id {
DDP_COMPONENT_OVL_2L1,
DDP_COMPONENT_OVL_2L2,
DDP_COMPONENT_OVL1,
+ DDP_COMPONENT_POSTMASK0,
DDP_COMPONENT_PWM0,
DDP_COMPONENT_PWM1,
DDP_COMPONENT_PWM2,
--
1.8.1.1.dirty
next prev parent reply other threads:[~2020-08-20 6:05 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-20 6:03 [PATCH v1 00/21] add drm support for MT8192 Yongqiang Niu
2020-08-20 6:03 ` [PATCH v1 01/21] drm/mediatek: add component OVL_2L2 Yongqiang Niu
2020-08-20 6:03 ` Yongqiang Niu [this message]
2020-08-20 6:04 ` [PATCH v1 03/21] drm/mediatek: add component RDMA4 Yongqiang Niu
2020-08-20 6:04 ` [PATCH v1 04/21] mtk-mmsys: add mt8192 mmsys support Yongqiang Niu
2020-08-20 23:35 ` Chun-Kuang Hu
2020-08-20 6:04 ` [PATCH v1 05/21] mtk-mmsys: add ovl mout on support Yongqiang Niu
2020-08-20 23:36 ` Chun-Kuang Hu
2020-08-20 6:04 ` [PATCH v1 06/21] drm/mediatek: add disp config and mm 26mhz clock into mutex device Yongqiang Niu
2020-08-20 23:40 ` Chun-Kuang Hu
2020-08-20 6:04 ` [PATCH v1 07/21] drm/mediatek: enable OVL_LAYER_SMI_ID_EN for multi-layer usecase Yongqiang Niu
2020-08-20 23:43 ` Chun-Kuang Hu
2020-08-20 6:04 ` [PATCH v1 08/21] drm/mediatek: check if fb is null Yongqiang Niu
2020-08-20 23:44 ` Chun-Kuang Hu
2020-08-20 6:04 ` [PATCH v1 09/21] drm/mediatek: fix aal size config Yongqiang Niu
2020-08-20 23:46 ` Chun-Kuang Hu
2020-08-20 6:04 ` [PATCH v1 10/21] drm/mediatek: fix dither " Yongqiang Niu
2020-08-20 6:04 ` [PATCH v1 11/21] drm/mediatek: fix gamma " Yongqiang Niu
2020-08-20 6:04 ` [PATCH v1 12/21] drm/mediatek: fix ccorr " Yongqiang Niu
2020-08-20 6:04 ` [PATCH v1 13/21] drm/mediatek: add support for mediatek SOC MT8192 Yongqiang Niu
2020-08-20 6:04 ` [PATCH v1 14/21] drm/mediatek: add bypass shadow register function call for ddp component Yongqiang Niu
2020-08-20 23:48 ` Chun-Kuang Hu
2020-08-20 6:04 ` [PATCH v1 15/21] drm/mediatek: add color bypass shadow register function Yongqiang Niu
2020-08-20 6:04 ` [PATCH v1 16/21] drm/mediatek: add ovl " Yongqiang Niu
2020-08-20 6:04 ` [PATCH v1 17/21] drm/mediatek: add rdma " Yongqiang Niu
2020-08-20 6:04 ` [PATCH v1 18/21] drm/mediatek: add dither " Yongqiang Niu
2020-08-20 6:04 ` [PATCH v1 19/21] drm/mediatek: add aal " Yongqiang Niu
2020-08-20 6:04 ` [PATCH v1 20/21] drm/mediatek: add ccorr " Yongqiang Niu
2020-08-20 6:04 ` [PATCH v1 21/21] arm64: dts: mt8192: add display node Yongqiang Niu
2020-08-20 13:23 ` Rob Herring
2020-08-20 9:13 ` [PATCH v1 00/21] add drm support for MT8192 Matthias Brugger
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1597903458-8055-3-git-send-email-yongqiang.niu@mediatek.com \
--to=yongqiang.niu@mediatek.com \
--cc=airlied@linux.ie \
--cc=ck.hu@mediatek.com \
--cc=daniel@ffwll.ch \
--cc=devicetree@vger.kernel.org \
--cc=dri-devel@lists.freedesktop.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=mark.rutland@arm.com \
--cc=matthias.bgg@gmail.com \
--cc=p.zabel@pengutronix.de \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).