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From: Yongqiang Niu <yongqiang.niu@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>
Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	Mark Rutland <mark.rutland@arm.com>,
	<dri-devel@lists.freedesktop.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	Yongqiang Niu <yongqiang.niu@mediatek.com>
Subject: [PATCH v1 06/21] drm/mediatek: add disp config and mm 26mhz clock into mutex device
Date: Thu, 20 Aug 2020 14:04:03 +0800	[thread overview]
Message-ID: <1597903458-8055-7-git-send-email-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <1597903458-8055-1-git-send-email-yongqiang.niu@mediatek.com>

there are 2 more clock need enable for display.
parser these clock when mutex device probe,
enable and disable when mutex on/off

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 49 ++++++++++++++++++++++++++++------
 1 file changed, 41 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index 60788c1..de618a1 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
@@ -118,7 +118,7 @@ struct mtk_ddp_data {
 
 struct mtk_ddp {
 	struct device			*dev;
-	struct clk			*clk;
+	struct clk			*clk[3];
 	void __iomem			*regs;
 	struct mtk_disp_mutex		mutex[10];
 	const struct mtk_ddp_data	*data;
@@ -257,14 +257,39 @@ int mtk_disp_mutex_prepare(struct mtk_disp_mutex *mutex)
 {
 	struct mtk_ddp *ddp = container_of(mutex, struct mtk_ddp,
 					   mutex[mutex->id]);
-	return clk_prepare_enable(ddp->clk);
+	int ret;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(ddp->clk); i++) {
+		if (IS_ERR(ddp->clk[i]))
+			continue;
+		ret = clk_prepare_enable(ddp->clk[i]);
+		if (ret) {
+			pr_err("failed to enable clock, err %d. i:%d\n",
+				ret, i);
+			goto err;
+		}
+	}
+
+	return 0;
+
+err:
+	while (--i >= 0)
+		clk_disable_unprepare(ddp->clk[i]);
+	return ret;
 }
 
 void mtk_disp_mutex_unprepare(struct mtk_disp_mutex *mutex)
 {
 	struct mtk_ddp *ddp = container_of(mutex, struct mtk_ddp,
 					   mutex[mutex->id]);
-	clk_disable_unprepare(ddp->clk);
+	int i;
+
+	 for (i = 0; i < ARRAY_SIZE(ddp->clk); i++) {
+		if (IS_ERR(ddp->clk[i]))
+			continue;
+		clk_disable_unprepare(ddp->clk[i]);
+	}
 }
 
 void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex,
@@ -415,11 +440,19 @@ static int mtk_ddp_probe(struct platform_device *pdev)
 	ddp->data = of_device_get_match_data(dev);
 
 	if (!ddp->data->no_clk) {
-		ddp->clk = devm_clk_get(dev, NULL);
-		if (IS_ERR(ddp->clk)) {
-			if (PTR_ERR(ddp->clk) != -EPROBE_DEFER)
-				dev_err(dev, "Failed to get clock\n");
-			return PTR_ERR(ddp->clk);
+		int ret;
+
+		for (i = 0; i < ARRAY_SIZE(ddp->clk); i++) {
+			ddp->clk[i] = of_clk_get(dev->of_node, i);
+
+			if (IS_ERR(ddp->clk[i])) {
+				ret = PTR_ERR(ddp->clk[i]);
+				if (ret != EPROBE_DEFER)
+					dev_err(dev, "Failed to get clock %d\n",
+						ret);
+
+				return ret;
+			}
 		}
 	}
 
-- 
1.8.1.1.dirty

  parent reply	other threads:[~2020-08-20  6:07 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-20  6:03 [PATCH v1 00/21] add drm support for MT8192 Yongqiang Niu
2020-08-20  6:03 ` [PATCH v1 01/21] drm/mediatek: add component OVL_2L2 Yongqiang Niu
2020-08-20  6:03 ` [PATCH v1 02/21] drm/mediatek: add component POSTMASK Yongqiang Niu
2020-08-20  6:04 ` [PATCH v1 03/21] drm/mediatek: add component RDMA4 Yongqiang Niu
2020-08-20  6:04 ` [PATCH v1 04/21] mtk-mmsys: add mt8192 mmsys support Yongqiang Niu
2020-08-20 23:35   ` Chun-Kuang Hu
2020-08-20  6:04 ` [PATCH v1 05/21] mtk-mmsys: add ovl mout on support Yongqiang Niu
2020-08-20 23:36   ` Chun-Kuang Hu
2020-08-20  6:04 ` Yongqiang Niu [this message]
2020-08-20 23:40   ` [PATCH v1 06/21] drm/mediatek: add disp config and mm 26mhz clock into mutex device Chun-Kuang Hu
2020-08-20  6:04 ` [PATCH v1 07/21] drm/mediatek: enable OVL_LAYER_SMI_ID_EN for multi-layer usecase Yongqiang Niu
2020-08-20 23:43   ` Chun-Kuang Hu
2020-08-20  6:04 ` [PATCH v1 08/21] drm/mediatek: check if fb is null Yongqiang Niu
2020-08-20 23:44   ` Chun-Kuang Hu
2020-08-20  6:04 ` [PATCH v1 09/21] drm/mediatek: fix aal size config Yongqiang Niu
2020-08-20 23:46   ` Chun-Kuang Hu
2020-08-20  6:04 ` [PATCH v1 10/21] drm/mediatek: fix dither " Yongqiang Niu
2020-08-20  6:04 ` [PATCH v1 11/21] drm/mediatek: fix gamma " Yongqiang Niu
2020-08-20  6:04 ` [PATCH v1 12/21] drm/mediatek: fix ccorr " Yongqiang Niu
2020-08-20  6:04 ` [PATCH v1 13/21] drm/mediatek: add support for mediatek SOC MT8192 Yongqiang Niu
2020-08-20  6:04 ` [PATCH v1 14/21] drm/mediatek: add bypass shadow register function call for ddp component Yongqiang Niu
2020-08-20 23:48   ` Chun-Kuang Hu
2020-08-20  6:04 ` [PATCH v1 15/21] drm/mediatek: add color bypass shadow register function Yongqiang Niu
2020-08-20  6:04 ` [PATCH v1 16/21] drm/mediatek: add ovl " Yongqiang Niu
2020-08-20  6:04 ` [PATCH v1 17/21] drm/mediatek: add rdma " Yongqiang Niu
2020-08-20  6:04 ` [PATCH v1 18/21] drm/mediatek: add dither " Yongqiang Niu
2020-08-20  6:04 ` [PATCH v1 19/21] drm/mediatek: add aal " Yongqiang Niu
2020-08-20  6:04 ` [PATCH v1 20/21] drm/mediatek: add ccorr " Yongqiang Niu
2020-08-20  6:04 ` [PATCH v1 21/21] arm64: dts: mt8192: add display node Yongqiang Niu
2020-08-20 13:23   ` Rob Herring
2020-08-20  9:13 ` [PATCH v1 00/21] add drm support for MT8192 Matthias Brugger

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