[PATCH 0/1] convert l2 cache dt bindings to YAML format

devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed

* [PATCH 0/1] convert l2 cache dt bindings to YAML format
@ 2020-08-24  7:50 Sagar Kadam
  2020-08-24  7:50 ` [PATCH 1/1] dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema Sagar Kadam
  0 siblings, 1 reply; 6+ messages in thread
From: Sagar Kadam @ 2020-08-24  7:50 UTC (permalink / raw)
  To: linux-kernel
  Cc: robh+dt, palmer, paul.walmsley, aou, yash.shah, devicetree,
	linux-riscv, Sagar Kadam

The patch is created on mainline linux v5.8.rc-7
commit 92ed30191993 ("Linux 5.8-rc7")

Following is the log for dt_binding_check and dtbs_check

linux> make DT_SCHEMA_FLAGS="-u" DT_SCHEMA_FILES="Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml" dt_binding_check
  HOSTCC  scripts/dtc/dtc.o
  HOSTCC  scripts/dtc/flattree.o
  HOSTCC  scripts/dtc/fstree.o
  HOSTCC  scripts/dtc/data.o
  HOSTCC  scripts/dtc/livetree.o
  HOSTCC  scripts/dtc/treesource.o
  HOSTCC  scripts/dtc/srcpos.o
  HOSTCC  scripts/dtc/checks.o
  HOSTCC  scripts/dtc/util.o
  LEX     scripts/dtc/dtc-lexer.lex.c
  YACC    scripts/dtc/dtc-parser.tab.[ch]
  HOSTCC  scripts/dtc/dtc-lexer.lex.o
  HOSTCC  scripts/dtc/dtc-parser.tab.o
  HOSTCC  scripts/dtc/yamltree.o
  HOSTLD  scripts/dtc/dtc
  CHKDT   Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
  SCHEMA  Documentation/devicetree/bindings/processed-schema-examples.yaml
  DTC     Documentation/devicetree/bindings/riscv/sifive-l2-cache.example.dt.yaml
  CHECK   Documentation/devicetree/bindings/riscv/sifive-l2-cache.example.dt.yaml
linux> make DT_SCHEMA_FLAGS="-u" DT_SCHEMA_FILES="Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml" dtbs_check
  SCHEMA  Documentation/devicetree/bindings/processed-schema.yaml
  UPD     include/config/kernel.release
  DTC     arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dtb
  DTC     arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dt.yaml
  CHECK   arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dt.yaml
linux>

Sagar Kadam (1):
  dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema

 .../devicetree/bindings/riscv/sifive-l2-cache.txt  | 51 ------------
 .../devicetree/bindings/riscv/sifive-l2-cache.yaml | 93 ++++++++++++++++++++++
 2 files changed, 93 insertions(+), 51 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt
 create mode 100644 Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml

-- 
2.7.4


^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH 1/1] dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema
  2020-08-24  7:50 [PATCH 0/1] convert l2 cache dt bindings to YAML format Sagar Kadam
@ 2020-08-24  7:50 ` Sagar Kadam
  2020-08-24 17:35   ` Rob Herring
  0 siblings, 1 reply; 6+ messages in thread
From: Sagar Kadam @ 2020-08-24  7:50 UTC (permalink / raw)
  To: linux-kernel
  Cc: robh+dt, palmer, paul.walmsley, aou, yash.shah, devicetree,
	linux-riscv, Sagar Kadam

Convert the device tree bindings for the SiFive's FU540-C000 SoC's L2 Cache
controller to YAML format.

Signed-off-by: Sagar Kadam <sagar.kadam@sifive.com>
---
 .../devicetree/bindings/riscv/sifive-l2-cache.txt  | 51 ------------
 .../devicetree/bindings/riscv/sifive-l2-cache.yaml | 93 ++++++++++++++++++++++
 2 files changed, 93 insertions(+), 51 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt
 create mode 100644 Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml

diff --git a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt b/Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt
deleted file mode 100644
index 73d8f19..0000000
--- a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt
+++ /dev/null
@@ -1,51 +0,0 @@
-SiFive L2 Cache Controller
---------------------------
-The SiFive Level 2 Cache Controller is used to provide access to fast copies
-of memory for masters in a Core Complex. The Level 2 Cache Controller also
-acts as directory-based coherency manager.
-All the properties in ePAPR/DeviceTree specification applies for this platform
-
-Required Properties:
---------------------
-- compatible: Should be "sifive,fu540-c000-ccache" and "cache"
-
-- cache-block-size: Specifies the block size in bytes of the cache.
-  Should be 64
-
-- cache-level: Should be set to 2 for a level 2 cache
-
-- cache-sets: Specifies the number of associativity sets of the cache.
-  Should be 1024
-
-- cache-size: Specifies the size in bytes of the cache. Should be 2097152
-
-- cache-unified: Specifies the cache is a unified cache
-
-- interrupts: Must contain 3 entries (DirError, DataError and DataFail signals)
-
-- reg: Physical base address and size of L2 cache controller registers map
-
-Optional Properties:
---------------------
-- next-level-cache: phandle to the next level cache if present.
-
-- memory-region: reference to the reserved-memory for the L2 Loosely Integrated
-  Memory region. The reserved memory node should be defined as per the bindings
-  in reserved-memory.txt
-
-
-Example:
-
-	cache-controller@2010000 {
-		compatible = "sifive,fu540-c000-ccache", "cache";
-		cache-block-size = <64>;
-		cache-level = <2>;
-		cache-sets = <1024>;
-		cache-size = <2097152>;
-		cache-unified;
-		interrupt-parent = <&plic0>;
-		interrupts = <1 2 3>;
-		reg = <0x0 0x2010000 0x0 0x1000>;
-		next-level-cache = <&L25 &L40 &L36>;
-		memory-region = <&l2_lim>;
-	};
diff --git a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml b/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
new file mode 100644
index 0000000..d2edeb0
--- /dev/null
+++ b/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
@@ -0,0 +1,93 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright (C) 2020 SiFive, Inc.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/riscv/sifive-l2-cache.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SiFive L2 Cache Controller
+
+maintainers:
+  - Sagar Kadam <sagar.kadam@sifive.com>
+  - Yash Shah <yash.shah@sifive.com>
+  - Paul Walmsley  <paul.walmsley@sifive.com>
+
+description:
+  The SiFive Level 2 Cache Controller is used to provide access to fast copies
+  of memory for masters in a Core Complex. The Level 2 Cache Controller also
+  acts as directory-based coherency manager.
+  All the properties in ePAPR/DeviceTree specification applies for this platform.
+
+allOf:
+  - $ref: /schemas/cache-controller.yaml#
+
+properties:
+  compatible:
+    items:
+     - enum:
+        - sifive,fu540-c000-ccache
+     - const: cache
+    description: |
+      Should have "sifive,<soc>-cache" and "cache".
+
+  cache-block-size:
+    const: 64
+
+  cache-level:
+    const: 2
+
+  cache-sets:
+    const: 1024
+
+  cache-size:
+    const: 2097152
+
+  cache-unified: true
+
+  interrupts:
+    description: |
+      Must contain entries for DirError, DataError and DataFail signals.
+    minItems: 1
+    maxItems: 3
+
+  reg:
+    maxItems: 1
+    description: address of cache controller's registers.
+
+
+  next-level-cache:
+    description: |
+      Phandle to the next level cache if present.
+
+  memory-region:
+    description: |
+      The reference to the reserved-memory for the L2 Loosely Integrated memory region.
+      The reserved memory node should be defined as per the bindings in reserved-memory.txt.
+
+additionalProperties: false
+
+required:
+  - compatible
+  - cache-block-size
+  - cache-level
+  - cache-sets
+  - cache-size
+  - cache-unified
+  - interrupts
+  - reg
+
+examples:
+  - |
+    cache-controller@2010000 {
+        compatible = "sifive,fu540-c000-ccache", "cache";
+        cache-block-size = <64>;
+        cache-level = <2>;
+        cache-sets = <1024>;
+        cache-size = <2097152>;
+        cache-unified;
+        reg = <0x2010000 0x1000>;
+        interrupt-parent = <&plic0>;
+        interrupts = <1 2 3>;
+        next-level-cache = <&L25>;
+        memory-region = <&l2_lim>;
+    };
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH 1/1] dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema
  2020-08-24  7:50 ` [PATCH 1/1] dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema Sagar Kadam
@ 2020-08-24 17:35   ` Rob Herring
  2020-08-25  8:47     ` Sagar Kadam
  0 siblings, 1 reply; 6+ messages in thread
From: Rob Herring @ 2020-08-24 17:35 UTC (permalink / raw)
  To: Sagar Kadam
  Cc: aou, devicetree, paul.walmsley, robh+dt, yash.shah, palmer,
	linux-kernel, linux-riscv

On Mon, 24 Aug 2020 13:20:21 +0530, Sagar Kadam wrote:
> Convert the device tree bindings for the SiFive's FU540-C000 SoC's L2 Cache
> controller to YAML format.
> 
> Signed-off-by: Sagar Kadam <sagar.kadam@sifive.com>
> ---
>  .../devicetree/bindings/riscv/sifive-l2-cache.txt  | 51 ------------
>  .../devicetree/bindings/riscv/sifive-l2-cache.yaml | 93 ++++++++++++++++++++++
>  2 files changed, 93 insertions(+), 51 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt
>  create mode 100644 Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> 


My bot found errors running 'make dt_binding_check' on your patch:

/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l2-cache: $nodename:0: 'l2-cache' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l2-cache: compatible:0: 'cache' is not one of ['sifive,fu540-c000-ccache']
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l2-cache: compatible: ['cache'] is too short
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l2-cache: 'l3-cache' does not match any of the regexes: 'pinctrl-[0-9]+'
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l2-cache: 'cache-block-size' is a required property
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l2-cache: 'cache-level' is a required property
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l2-cache: 'cache-sets' is a required property
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l2-cache: 'cache-size' is a required property
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l2-cache: 'cache-unified' is a required property
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l2-cache: 'reg' is a required property
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l2-cache: {'compatible': ['cache'], 'next-level-cache': [[2]], 'phandle': [[1]], 'l3-cache': {'compatible': ['cache'], 'phandle': [[2]]}, '$nodename': ['l2-cache']} is not valid under any of the given schemas
{'$filename': '/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml',
 '$id': 'http://devicetree.org/schemas/riscv/sifive-l2-cache.yaml#',
 '$schema': 'http://devicetree.org/meta-schemas/core.yaml#',
 '$select_validator': <jsonschema.validators.create.<locals>.Validator object at 0x7efcd84bc850>,
 'additionalProperties': False,
 'allOf': [{'$ref': '/schemas/cache-controller.yaml#'}],
 'oneOf': [{'required': ['interrupts']},
           {'required': ['interrupts-extended']}],
 'patternProperties': {'pinctrl-[0-9]+': True},
 'properties': {'$nodename': True,
                'cache-block-size': {'additionalItems': False,
                                     'items': [{'additionalItems': False,
                                                'items': [{'const': 64}],
                                                'maxItems': 1,
                                                'minItems': 1,
                                                'type': 'array'}],
                                     'maxItems': 1,
                                     'minItems': 1,
                                     'type': 'array'},
                'cache-level': {'additionalItems': False,
                                'items': [{'additionalItems': False,
                                           'items': [{'const': 2}],
                                           'maxItems': 1,
                                           'minItems': 1,
                                           'type': 'array'}],
                                'maxItems': 1,
                                'minItems': 1,
                                'type': 'array'},
                'cache-sets': {'additionalItems': False,
                               'items': [{'additionalItems': False,
                                          'items': [{'const': 1024}],
                                          'maxItems': 1,
                                          'minItems': 1,
                                          'type': 'array'}],
                               'maxItems': 1,
                               'minItems': 1,
                               'type': 'array'},
                'cache-size': {'additionalItems': False,
                               'items': [{'additionalItems': False,
                                          'items': [{'const': 2097152}],
                                          'maxItems': 1,
                                          'minItems': 1,
                                          'type': 'array'}],
                               'maxItems': 1,
                               'minItems': 1,
                               'type': 'array'},
                'cache-unified': True,
                'compatible': {'additionalItems': False,
                               'items': [{'enum': ['sifive,fu540-c000-ccache']},
                                         {'const': 'cache'}],
                               'maxItems': 2,
                               'minItems': 2,
                               'type': 'array'},
                'interrupt-parent': True,
                'interrupts': {'maxItems': 3, 'minItems': 1},
                'interrupts-extended': {'maxItems': 3, 'minItems': 1},
                'memory-region': {},
                'next-level-cache': {},
                'phandle': True,
                'pinctrl-names': True,
                'reg': {'maxItems': 1, 'minItems': 1},
                'status': True},
 'required': ['compatible',
              'cache-block-size',
              'cache-level',
              'cache-sets',
              'cache-size',
              'cache-unified',
              'reg'],
 'select': {'properties': {'compatible': {'contains': {'enum': ['cache',
                                                                'sifive,fu540-c000-ccache']}}},
            'required': ['compatible']},
 'title': 'SiFive L2 Cache Controller'} (Possible causes of the failure):
	/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l2-cache: 'interrupts' is a required property

	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l3-cache: $nodename:0: 'l3-cache' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l3-cache: compatible:0: 'cache' is not one of ['sifive,fu540-c000-ccache']
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l3-cache: compatible: ['cache'] is too short
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l3-cache: 'cache-block-size' is a required property
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l3-cache: 'cache-level' is a required property
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l3-cache: 'cache-sets' is a required property
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l3-cache: 'cache-size' is a required property
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l3-cache: 'cache-unified' is a required property
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l3-cache: 'reg' is a required property
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l3-cache: {'compatible': ['cache'], 'phandle': [[2]], '$nodename': ['l3-cache']} is not valid under any of the given schemas
{'$filename': '/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml',
 '$id': 'http://devicetree.org/schemas/riscv/sifive-l2-cache.yaml#',
 '$schema': 'http://devicetree.org/meta-schemas/core.yaml#',
 '$select_validator': <jsonschema.validators.create.<locals>.Validator object at 0x7efcd84bc850>,
 'additionalProperties': False,
 'allOf': [{'$ref': '/schemas/cache-controller.yaml#'}],
 'oneOf': [{'required': ['interrupts']},
           {'required': ['interrupts-extended']}],
 'patternProperties': {'pinctrl-[0-9]+': True},
 'properties': {'$nodename': True,
                'cache-block-size': {'additionalItems': False,
                                     'items': [{'additionalItems': False,
                                                'items': [{'const': 64}],
                                                'maxItems': 1,
                                                'minItems': 1,
                                                'type': 'array'}],
                                     'maxItems': 1,
                                     'minItems': 1,
                                     'type': 'array'},
                'cache-level': {'additionalItems': False,
                                'items': [{'additionalItems': False,
                                           'items': [{'const': 2}],
                                           'maxItems': 1,
                                           'minItems': 1,
                                           'type': 'array'}],
                                'maxItems': 1,
                                'minItems': 1,
                                'type': 'array'},
                'cache-sets': {'additionalItems': False,
                               'items': [{'additionalItems': False,
                                          'items': [{'const': 1024}],
                                          'maxItems': 1,
                                          'minItems': 1,
                                          'type': 'array'}],
                               'maxItems': 1,
                               'minItems': 1,
                               'type': 'array'},
                'cache-size': {'additionalItems': False,
                               'items': [{'additionalItems': False,
                                          'items': [{'const': 2097152}],
                                          'maxItems': 1,
                                          'minItems': 1,
                                          'type': 'array'}],
                               'maxItems': 1,
                               'minItems': 1,
                               'type': 'array'},
                'cache-unified': True,
                'compatible': {'additionalItems': False,
                               'items': [{'enum': ['sifive,fu540-c000-ccache']},
                                         {'const': 'cache'}],
                               'maxItems': 2,
                               'minItems': 2,
                               'type': 'array'},
                'interrupt-parent': True,
                'interrupts': {'maxItems': 3, 'minItems': 1},
                'interrupts-extended': {'maxItems': 3, 'minItems': 1},
                'memory-region': {},
                'next-level-cache': {},
                'phandle': True,
                'pinctrl-names': True,
                'reg': {'maxItems': 1, 'minItems': 1},
                'status': True},
 'required': ['compatible',
              'cache-block-size',
              'cache-level',
              'cache-sets',
              'cache-size',
              'cache-unified',
              'reg'],
 'select': {'properties': {'compatible': {'contains': {'enum': ['cache',
                                                                'sifive,fu540-c000-ccache']}}},
            'required': ['compatible']},
 'title': 'SiFive L2 Cache Controller'} (Possible causes of the failure):
	/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.example.dt.yaml: l3-cache: 'interrupts' is a required property

	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/power/renesas,rcar-sysc.example.dt.yaml: cache-controller-0: $nodename:0: 'cache-controller-0' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/power/renesas,rcar-sysc.example.dt.yaml: cache-controller-0: compatible:0: 'cache' is not one of ['sifive,fu540-c000-ccache']
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/power/renesas,rcar-sysc.example.dt.yaml: cache-controller-0: compatible: ['cache'] is too short
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/power/renesas,rcar-sysc.example.dt.yaml: cache-controller-0: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+'
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/power/renesas,rcar-sysc.example.dt.yaml: cache-controller-0: 'cache-block-size' is a required property
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/power/renesas,rcar-sysc.example.dt.yaml: cache-controller-0: 'cache-sets' is a required property
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/power/renesas,rcar-sysc.example.dt.yaml: cache-controller-0: 'cache-size' is a required property
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/power/renesas,rcar-sysc.example.dt.yaml: cache-controller-0: 'reg' is a required property
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/power/renesas,rcar-sysc.example.dt.yaml: cache-controller-0: {'compatible': ['cache'], 'power-domains': [[1, 12]], 'cache-unified': True, 'cache-level': [[2]], '$nodename': ['cache-controller-0']} is not valid under any of the given schemas
{'$filename': '/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml',
 '$id': 'http://devicetree.org/schemas/riscv/sifive-l2-cache.yaml#',
 '$schema': 'http://devicetree.org/meta-schemas/core.yaml#',
 '$select_validator': <jsonschema.validators.create.<locals>.Validator object at 0x7f26dd3928b0>,
 'additionalProperties': False,
 'allOf': [{'$ref': '/schemas/cache-controller.yaml#'}],
 'oneOf': [{'required': ['interrupts']},
           {'required': ['interrupts-extended']}],
 'patternProperties': {'pinctrl-[0-9]+': True},
 'properties': {'$nodename': True,
                'cache-block-size': {'additionalItems': False,
                                     'items': [{'additionalItems': False,
                                                'items': [{'const': 64}],
                                                'maxItems': 1,
                                                'minItems': 1,
                                                'type': 'array'}],
                                     'maxItems': 1,
                                     'minItems': 1,
                                     'type': 'array'},
                'cache-level': {'additionalItems': False,
                                'items': [{'additionalItems': False,
                                           'items': [{'const': 2}],
                                           'maxItems': 1,
                                           'minItems': 1,
                                           'type': 'array'}],
                                'maxItems': 1,
                                'minItems': 1,
                                'type': 'array'},
                'cache-sets': {'additionalItems': False,
                               'items': [{'additionalItems': False,
                                          'items': [{'const': 1024}],
                                          'maxItems': 1,
                                          'minItems': 1,
                                          'type': 'array'}],
                               'maxItems': 1,
                               'minItems': 1,
                               'type': 'array'},
                'cache-size': {'additionalItems': False,
                               'items': [{'additionalItems': False,
                                          'items': [{'const': 2097152}],
                                          'maxItems': 1,
                                          'minItems': 1,
                                          'type': 'array'}],
                               'maxItems': 1,
                               'minItems': 1,
                               'type': 'array'},
                'cache-unified': True,
                'compatible': {'additionalItems': False,
                               'items': [{'enum': ['sifive,fu540-c000-ccache']},
                                         {'const': 'cache'}],
                               'maxItems': 2,
                               'minItems': 2,
                               'type': 'array'},
                'interrupt-parent': True,
                'interrupts': {'maxItems': 3, 'minItems': 1},
                'interrupts-extended': {'maxItems': 3, 'minItems': 1},
                'memory-region': {},
                'next-level-cache': {},
                'phandle': True,
                'pinctrl-names': True,
                'reg': {'maxItems': 1, 'minItems': 1},
                'status': True},
 'required': ['compatible',
              'cache-block-size',
              'cache-level',
              'cache-sets',
              'cache-size',
              'cache-unified',
              'reg'],
 'select': {'properties': {'compatible': {'contains': {'enum': ['cache',
                                                                'sifive,fu540-c000-ccache']}}},
            'required': ['compatible']},
 'title': 'SiFive L2 Cache Controller'} (Possible causes of the failure):
	/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/power/renesas,rcar-sysc.example.dt.yaml: cache-controller-0: 'interrupts' is a required property

	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml


See https://patchwork.ozlabs.org/patch/1350111

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure dt-schema is up to date:

pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade

Please check and re-submit.


^ permalink raw reply	[flat|nested] 6+ messages in thread

* RE: [PATCH 1/1] dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema
  2020-08-24 17:35   ` Rob Herring
@ 2020-08-25  8:47     ` Sagar Kadam
  2020-08-25 16:21       ` Rob Herring
  0 siblings, 1 reply; 6+ messages in thread
From: Sagar Kadam @ 2020-08-25  8:47 UTC (permalink / raw)
  To: Rob Herring
  Cc: aou@eecs.berkeley.edu, devicetree@vger.kernel.org,
	Paul Walmsley ( Sifive), robh+dt@kernel.org, Yash Shah,
	palmer@dabbelt.com, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org

Hello Rob,

> -----Original Message-----
> From: Rob Herring <robh@kernel.org>
> Sent: Monday, August 24, 2020 11:06 PM
> To: Sagar Kadam <sagar.kadam@openfive.com>
> Cc: aou@eecs.berkeley.edu; devicetree@vger.kernel.org; Paul Walmsley (
> Sifive) <paul.walmsley@sifive.com>; robh+dt@kernel.org; Yash Shah
> <yash.shah@openfive.com>; palmer@dabbelt.com; linux-
> kernel@vger.kernel.org; linux-riscv@lists.infradead.org
> Subject: Re: [PATCH 1/1] dt-bindings: riscv: sifive-l2-cache: convert bindings
> to json-schema
> 
> [External Email] Do not click links or attachments unless you recognize the
> sender and know the content is safe
> 
> On Mon, 24 Aug 2020 13:20:21 +0530, Sagar Kadam wrote:
> > Convert the device tree bindings for the SiFive's FU540-C000 SoC's L2
> > Cache controller to YAML format.
> >
> > Signed-off-by: Sagar Kadam <sagar.kadam@sifive.com>
> > ---
> >  .../devicetree/bindings/riscv/sifive-l2-cache.txt  | 51 ------------
> > .../devicetree/bindings/riscv/sifive-l2-cache.yaml | 93
> > ++++++++++++++++++++++
> >  2 files changed, 93 insertions(+), 51 deletions(-)  delete mode
> > 100644 Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt
> >  create mode 100644
> > Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> >
> 
> 
> My bot found errors running 'make dt_binding_check' on your patch:
> 
 
I had checked using DT_SCHEMA_FILES option due to which it didn't catch any error on other 
schemas. Without this I could regenerate the error you mentioned.
I will fix it and update. Sorry for the error.

Thanks & BR,
Sagar

> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l2-cache: $nodename:0: 'l2-cache' does not match
> '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l2-cache: compatible:0: 'cache' is not one of
> ['sifive,fu540-c000-ccache']
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l2-cache: compatible: ['cache'] is too short
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l2-cache: 'l3-cache' does not match any of the
> regexes: 'pinctrl-[0-9]+'
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l2-cache: 'cache-block-size' is a required property
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l2-cache: 'cache-level' is a required property
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l2-cache: 'cache-sets' is a required property
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l2-cache: 'cache-size' is a required property
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l2-cache: 'cache-unified' is a required property
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l2-cache: 'reg' is a required property
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l2-cache: {'compatible': ['cache'], 'next-level-cache':
> [[2]], 'phandle': [[1]], 'l3-cache': {'compatible': ['cache'], 'phandle': [[2]]},
> '$nodename': ['l2-cache']} is not valid under any of the given schemas
> {'$filename': '/builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml',
>  '$id': 'http://devicetree.org/schemas/riscv/sifive-l2-cache.yaml#',
>  '$schema': 'http://devicetree.org/meta-schemas/core.yaml#',
>  '$select_validator': <jsonschema.validators.create.<locals>.Validator object
> at 0x7efcd84bc850>,
>  'additionalProperties': False,
>  'allOf': [{'$ref': '/schemas/cache-controller.yaml#'}],
>  'oneOf': [{'required': ['interrupts']},
>            {'required': ['interrupts-extended']}],
>  'patternProperties': {'pinctrl-[0-9]+': True},
>  'properties': {'$nodename': True,
>                 'cache-block-size': {'additionalItems': False,
>                                      'items': [{'additionalItems': False,
>                                                 'items': [{'const': 64}],
>                                                 'maxItems': 1,
>                                                 'minItems': 1,
>                                                 'type': 'array'}],
>                                      'maxItems': 1,
>                                      'minItems': 1,
>                                      'type': 'array'},
>                 'cache-level': {'additionalItems': False,
>                                 'items': [{'additionalItems': False,
>                                            'items': [{'const': 2}],
>                                            'maxItems': 1,
>                                            'minItems': 1,
>                                            'type': 'array'}],
>                                 'maxItems': 1,
>                                 'minItems': 1,
>                                 'type': 'array'},
>                 'cache-sets': {'additionalItems': False,
>                                'items': [{'additionalItems': False,
>                                           'items': [{'const': 1024}],
>                                           'maxItems': 1,
>                                           'minItems': 1,
>                                           'type': 'array'}],
>                                'maxItems': 1,
>                                'minItems': 1,
>                                'type': 'array'},
>                 'cache-size': {'additionalItems': False,
>                                'items': [{'additionalItems': False,
>                                           'items': [{'const': 2097152}],
>                                           'maxItems': 1,
>                                           'minItems': 1,
>                                           'type': 'array'}],
>                                'maxItems': 1,
>                                'minItems': 1,
>                                'type': 'array'},
>                 'cache-unified': True,
>                 'compatible': {'additionalItems': False,
>                                'items': [{'enum': ['sifive,fu540-c000-ccache']},
>                                          {'const': 'cache'}],
>                                'maxItems': 2,
>                                'minItems': 2,
>                                'type': 'array'},
>                 'interrupt-parent': True,
>                 'interrupts': {'maxItems': 3, 'minItems': 1},
>                 'interrupts-extended': {'maxItems': 3, 'minItems': 1},
>                 'memory-region': {},
>                 'next-level-cache': {},
>                 'phandle': True,
>                 'pinctrl-names': True,
>                 'reg': {'maxItems': 1, 'minItems': 1},
>                 'status': True},
>  'required': ['compatible',
>               'cache-block-size',
>               'cache-level',
>               'cache-sets',
>               'cache-size',
>               'cache-unified',
>               'reg'],
>  'select': {'properties': {'compatible': {'contains': {'enum': ['cache',
>                                                                 'sifive,fu540-c000-ccache']}}},
>             'required': ['compatible']},
>  'title': 'SiFive L2 Cache Controller'} (Possible causes of the failure):
>         /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l2-cache: 'interrupts' is a required property
> 
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l3-cache: $nodename:0: 'l3-cache' does not match
> '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l3-cache: compatible:0: 'cache' is not one of
> ['sifive,fu540-c000-ccache']
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l3-cache: compatible: ['cache'] is too short
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l3-cache: 'cache-block-size' is a required property
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l3-cache: 'cache-level' is a required property
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l3-cache: 'cache-sets' is a required property
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l3-cache: 'cache-size' is a required property
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l3-cache: 'cache-unified' is a required property
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l3-cache: 'reg' is a required property
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l3-cache: {'compatible': ['cache'], 'phandle': [[2]],
> '$nodename': ['l3-cache']} is not valid under any of the given schemas
> {'$filename': '/builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml',
>  '$id': 'http://devicetree.org/schemas/riscv/sifive-l2-cache.yaml#',
>  '$schema': 'http://devicetree.org/meta-schemas/core.yaml#',
>  '$select_validator': <jsonschema.validators.create.<locals>.Validator object
> at 0x7efcd84bc850>,
>  'additionalProperties': False,
>  'allOf': [{'$ref': '/schemas/cache-controller.yaml#'}],
>  'oneOf': [{'required': ['interrupts']},
>            {'required': ['interrupts-extended']}],
>  'patternProperties': {'pinctrl-[0-9]+': True},
>  'properties': {'$nodename': True,
>                 'cache-block-size': {'additionalItems': False,
>                                      'items': [{'additionalItems': False,
>                                                 'items': [{'const': 64}],
>                                                 'maxItems': 1,
>                                                 'minItems': 1,
>                                                 'type': 'array'}],
>                                      'maxItems': 1,
>                                      'minItems': 1,
>                                      'type': 'array'},
>                 'cache-level': {'additionalItems': False,
>                                 'items': [{'additionalItems': False,
>                                            'items': [{'const': 2}],
>                                            'maxItems': 1,
>                                            'minItems': 1,
>                                            'type': 'array'}],
>                                 'maxItems': 1,
>                                 'minItems': 1,
>                                 'type': 'array'},
>                 'cache-sets': {'additionalItems': False,
>                                'items': [{'additionalItems': False,
>                                           'items': [{'const': 1024}],
>                                           'maxItems': 1,
>                                           'minItems': 1,
>                                           'type': 'array'}],
>                                'maxItems': 1,
>                                'minItems': 1,
>                                'type': 'array'},
>                 'cache-size': {'additionalItems': False,
>                                'items': [{'additionalItems': False,
>                                           'items': [{'const': 2097152}],
>                                           'maxItems': 1,
>                                           'minItems': 1,
>                                           'type': 'array'}],
>                                'maxItems': 1,
>                                'minItems': 1,
>                                'type': 'array'},
>                 'cache-unified': True,
>                 'compatible': {'additionalItems': False,
>                                'items': [{'enum': ['sifive,fu540-c000-ccache']},
>                                          {'const': 'cache'}],
>                                'maxItems': 2,
>                                'minItems': 2,
>                                'type': 'array'},
>                 'interrupt-parent': True,
>                 'interrupts': {'maxItems': 3, 'minItems': 1},
>                 'interrupts-extended': {'maxItems': 3, 'minItems': 1},
>                 'memory-region': {},
>                 'next-level-cache': {},
>                 'phandle': True,
>                 'pinctrl-names': True,
>                 'reg': {'maxItems': 1, 'minItems': 1},
>                 'status': True},
>  'required': ['compatible',
>               'cache-block-size',
>               'cache-level',
>               'cache-sets',
>               'cache-size',
>               'cache-unified',
>               'reg'],
>  'select': {'properties': {'compatible': {'contains': {'enum': ['cache',
>                                                                 'sifive,fu540-c000-ccache']}}},
>             'required': ['compatible']},
>  'title': 'SiFive L2 Cache Controller'} (Possible causes of the failure):
>         /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/thermal/thermal-cooling-
> devices.example.dt.yaml: l3-cache: 'interrupts' is a required property
> 
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/power/renesas,rcar-
> sysc.example.dt.yaml: cache-controller-0: $nodename:0: 'cache-controller-0'
> does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/power/renesas,rcar-
> sysc.example.dt.yaml: cache-controller-0: compatible:0: 'cache' is not one of
> ['sifive,fu540-c000-ccache']
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/power/renesas,rcar-
> sysc.example.dt.yaml: cache-controller-0: compatible: ['cache'] is too short
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/power/renesas,rcar-
> sysc.example.dt.yaml: cache-controller-0: 'power-domains' does not match
> any of the regexes: 'pinctrl-[0-9]+'
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/power/renesas,rcar-
> sysc.example.dt.yaml: cache-controller-0: 'cache-block-size' is a required
> property
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/power/renesas,rcar-
> sysc.example.dt.yaml: cache-controller-0: 'cache-sets' is a required property
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/power/renesas,rcar-
> sysc.example.dt.yaml: cache-controller-0: 'cache-size' is a required property
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/power/renesas,rcar-
> sysc.example.dt.yaml: cache-controller-0: 'reg' is a required property
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/power/renesas,rcar-
> sysc.example.dt.yaml: cache-controller-0: {'compatible': ['cache'], 'power-
> domains': [[1, 12]], 'cache-unified': True, 'cache-level': [[2]], '$nodename':
> ['cache-controller-0']} is not valid under any of the given schemas
> {'$filename': '/builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml',
>  '$id': 'http://devicetree.org/schemas/riscv/sifive-l2-cache.yaml#',
>  '$schema': 'http://devicetree.org/meta-schemas/core.yaml#',
>  '$select_validator': <jsonschema.validators.create.<locals>.Validator object
> at 0x7f26dd3928b0>,
>  'additionalProperties': False,
>  'allOf': [{'$ref': '/schemas/cache-controller.yaml#'}],
>  'oneOf': [{'required': ['interrupts']},
>            {'required': ['interrupts-extended']}],
>  'patternProperties': {'pinctrl-[0-9]+': True},
>  'properties': {'$nodename': True,
>                 'cache-block-size': {'additionalItems': False,
>                                      'items': [{'additionalItems': False,
>                                                 'items': [{'const': 64}],
>                                                 'maxItems': 1,
>                                                 'minItems': 1,
>                                                 'type': 'array'}],
>                                      'maxItems': 1,
>                                      'minItems': 1,
>                                      'type': 'array'},
>                 'cache-level': {'additionalItems': False,
>                                 'items': [{'additionalItems': False,
>                                            'items': [{'const': 2}],
>                                            'maxItems': 1,
>                                            'minItems': 1,
>                                            'type': 'array'}],
>                                 'maxItems': 1,
>                                 'minItems': 1,
>                                 'type': 'array'},
>                 'cache-sets': {'additionalItems': False,
>                                'items': [{'additionalItems': False,
>                                           'items': [{'const': 1024}],
>                                           'maxItems': 1,
>                                           'minItems': 1,
>                                           'type': 'array'}],
>                                'maxItems': 1,
>                                'minItems': 1,
>                                'type': 'array'},
>                 'cache-size': {'additionalItems': False,
>                                'items': [{'additionalItems': False,
>                                           'items': [{'const': 2097152}],
>                                           'maxItems': 1,
>                                           'minItems': 1,
>                                           'type': 'array'}],
>                                'maxItems': 1,
>                                'minItems': 1,
>                                'type': 'array'},
>                 'cache-unified': True,
>                 'compatible': {'additionalItems': False,
>                                'items': [{'enum': ['sifive,fu540-c000-ccache']},
>                                          {'const': 'cache'}],
>                                'maxItems': 2,
>                                'minItems': 2,
>                                'type': 'array'},
>                 'interrupt-parent': True,
>                 'interrupts': {'maxItems': 3, 'minItems': 1},
>                 'interrupts-extended': {'maxItems': 3, 'minItems': 1},
>                 'memory-region': {},
>                 'next-level-cache': {},
>                 'phandle': True,
>                 'pinctrl-names': True,
>                 'reg': {'maxItems': 1, 'minItems': 1},
>                 'status': True},
>  'required': ['compatible',
>               'cache-block-size',
>               'cache-level',
>               'cache-sets',
>               'cache-size',
>               'cache-unified',
>               'reg'],
>  'select': {'properties': {'compatible': {'contains': {'enum': ['cache',
>                                                                 'sifive,fu540-c000-ccache']}}},
>             'required': ['compatible']},
>  'title': 'SiFive L2 Cache Controller'} (Possible causes of the failure):
>         /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/power/renesas,rcar-
> sysc.example.dt.yaml: cache-controller-0: 'interrupts' is a required property
> 
>         From schema: /builds/robherring/linux-dt-
> review/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> 
> 
> See https://patchwork.ozlabs.org/patch/1350111
> 
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure dt-schema is up to date:
> 
> pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --
> upgrade
> 
> Please check and re-submit.


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 1/1] dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema
  2020-08-25  8:47     ` Sagar Kadam
@ 2020-08-25 16:21       ` Rob Herring
  2020-08-25 16:41         ` Sagar Kadam
  0 siblings, 1 reply; 6+ messages in thread
From: Rob Herring @ 2020-08-25 16:21 UTC (permalink / raw)
  To: Sagar Kadam
  Cc: aou@eecs.berkeley.edu, devicetree@vger.kernel.org,
	Paul Walmsley ( Sifive), Yash Shah, palmer@dabbelt.com,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org

On Tue, Aug 25, 2020 at 2:47 AM Sagar Kadam <sagar.kadam@openfive.com> wrote:
>
> Hello Rob,
>
> > -----Original Message-----
> > From: Rob Herring <robh@kernel.org>
> > Sent: Monday, August 24, 2020 11:06 PM
> > To: Sagar Kadam <sagar.kadam@openfive.com>
> > Cc: aou@eecs.berkeley.edu; devicetree@vger.kernel.org; Paul Walmsley (
> > Sifive) <paul.walmsley@sifive.com>; robh+dt@kernel.org; Yash Shah
> > <yash.shah@openfive.com>; palmer@dabbelt.com; linux-
> > kernel@vger.kernel.org; linux-riscv@lists.infradead.org
> > Subject: Re: [PATCH 1/1] dt-bindings: riscv: sifive-l2-cache: convert bindings
> > to json-schema
> >
> > [External Email] Do not click links or attachments unless you recognize the
> > sender and know the content is safe
> >
> > On Mon, 24 Aug 2020 13:20:21 +0530, Sagar Kadam wrote:
> > > Convert the device tree bindings for the SiFive's FU540-C000 SoC's L2
> > > Cache controller to YAML format.
> > >
> > > Signed-off-by: Sagar Kadam <sagar.kadam@sifive.com>
> > > ---
> > >  .../devicetree/bindings/riscv/sifive-l2-cache.txt  | 51 ------------
> > > .../devicetree/bindings/riscv/sifive-l2-cache.yaml | 93
> > > ++++++++++++++++++++++
> > >  2 files changed, 93 insertions(+), 51 deletions(-)  delete mode
> > > 100644 Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt
> > >  create mode 100644
> > > Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> > >
> >
> >
> > My bot found errors running 'make dt_binding_check' on your patch:
> >
>
> I had checked using DT_SCHEMA_FILES option due to which it didn't catch any error on other
> schemas. Without this I could regenerate the error you mentioned.
> I will fix it and update. Sorry for the error.

Update your kernel. DT_SCHEMA_FILES setting no longer matters on
current tree. It only affects 'dtbs_check' now.

Rob

^ permalink raw reply	[flat|nested] 6+ messages in thread

* RE: [PATCH 1/1] dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema
  2020-08-25 16:21       ` Rob Herring
@ 2020-08-25 16:41         ` Sagar Kadam
  0 siblings, 0 replies; 6+ messages in thread
From: Sagar Kadam @ 2020-08-25 16:41 UTC (permalink / raw)
  To: Rob Herring
  Cc: aou@eecs.berkeley.edu, devicetree@vger.kernel.org,
	Paul Walmsley ( Sifive), Yash Shah, palmer@dabbelt.com,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org

Hi Rob,

> -----Original Message-----
> From: Rob Herring <robh@kernel.org>
> Sent: Tuesday, August 25, 2020 9:51 PM
> To: Sagar Kadam <sagar.kadam@openfive.com>
> Cc: aou@eecs.berkeley.edu; devicetree@vger.kernel.org; Paul Walmsley (
> Sifive) <paul.walmsley@sifive.com>; Yash Shah <yash.shah@openfive.com>;
> palmer@dabbelt.com; linux-kernel@vger.kernel.org; linux-
> riscv@lists.infradead.org
> Subject: Re: [PATCH 1/1] dt-bindings: riscv: sifive-l2-cache: convert bindings
> to json-schema
> 
> [External Email] Do not click links or attachments unless you recognize the
> sender and know the content is safe
> 
> On Tue, Aug 25, 2020 at 2:47 AM Sagar Kadam
> <sagar.kadam@openfive.com> wrote:
> >
> > Hello Rob,
> >
> > > -----Original Message-----
> > > From: Rob Herring <robh@kernel.org>
> > > Sent: Monday, August 24, 2020 11:06 PM
> > > To: Sagar Kadam <sagar.kadam@openfive.com>
> > > Cc: aou@eecs.berkeley.edu; devicetree@vger.kernel.org; Paul Walmsley
> > > (
> > > Sifive) <paul.walmsley@sifive.com>; robh+dt@kernel.org; Yash Shah
> > > <yash.shah@openfive.com>; palmer@dabbelt.com; linux-
> > > kernel@vger.kernel.org; linux-riscv@lists.infradead.org
> > > Subject: Re: [PATCH 1/1] dt-bindings: riscv: sifive-l2-cache:
> > > convert bindings to json-schema
> > >
> > > [External Email] Do not click links or attachments unless you
> > > recognize the sender and know the content is safe
> > >
> > > On Mon, 24 Aug 2020 13:20:21 +0530, Sagar Kadam wrote:
> > > > Convert the device tree bindings for the SiFive's FU540-C000 SoC's
> > > > L2 Cache controller to YAML format.
> > > >
> > > > Signed-off-by: Sagar Kadam <sagar.kadam@sifive.com>
> > > > ---
> > > >  .../devicetree/bindings/riscv/sifive-l2-cache.txt  | 51
> > > > ------------ .../devicetree/bindings/riscv/sifive-l2-cache.yaml |
> > > > 93
> > > > ++++++++++++++++++++++
> > > >  2 files changed, 93 insertions(+), 51 deletions(-)  delete mode
> > > > 100644 Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt
> > > >  create mode 100644
> > > > Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> > > >
> > >
> > >
> > > My bot found errors running 'make dt_binding_check' on your patch:
> > >
> >
> > I had checked using DT_SCHEMA_FILES option due to which it didn't
> > catch any error on other schemas. Without this I could regenerate the
> error you mentioned.
> > I will fix it and update. Sorry for the error.
> 
> Update your kernel. DT_SCHEMA_FILES setting no longer matters on current
> tree. It only affects 'dtbs_check' now.
> 

Thanks for the input.
Sure, I see v5.9-rc2 as latest tag on mainline, I will base and fix my patch above it.

BR,
Sagar

> Rob

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2020-08-25 16:41 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-08-24  7:50 [PATCH 0/1] convert l2 cache dt bindings to YAML format Sagar Kadam
2020-08-24  7:50 ` [PATCH 1/1] dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema Sagar Kadam
2020-08-24 17:35   ` Rob Herring
2020-08-25  8:47     ` Sagar Kadam
2020-08-25 16:21       ` Rob Herring
2020-08-25 16:41         ` Sagar Kadam

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).