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From: Crystal Guo <crystal.guo@mediatek.com>
To: "robh+dt@kernel.org" <robh+dt@kernel.org>,
	Suman Anna <s-anna@ti.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>
Cc: srv_heupstream <srv_heupstream@mediatek.com>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"Seiya Wang (王迺君)" <seiya.wang@mediatek.com>,
	"Stanley Chu (朱原陞)" <stanley.chu@mediatek.com>,
	"Yingjoe Chen (陳英洲)" <Yingjoe.Chen@mediatek.com>,
	"Fan Chen (陳凡)" <fan.chen@mediatek.com>,
	"Yong Liang (梁勇)" <Yong.Liang@mediatek.com>
Subject: Re: [v4,3/4] reset-controller: ti: introduce a new reset handler
Date: Tue, 29 Sep 2020 21:54:00 +0800	[thread overview]
Message-ID: <1601387640.14806.37.camel@mhfsdcap03> (raw)
In-Reply-To: <1600092019.14806.32.camel@mhfsdcap03>

On Mon, 2020-09-14 at 22:00 +0800, Crystal Guo wrote:
> On Fri, 2020-09-11 at 22:44 +0800, Suman Anna wrote:
> > On 9/11/20 9:26 AM, Philipp Zabel wrote:
> > > Hi Crystal,
> > > 
> > > On Fri, 2020-09-11 at 14:07 +0800, Crystal Guo wrote:
> > > [...]
> > >> Should I add the SoC-specific data as follows?
> > >> This may also modify the ti original code, is it OK?
> > >>
> > >> +       data->reset_data = of_device_get_match_data(&pdev->dev);
> > >> +
> > >> +       list = of_get_property(np, data->reset_data->reset_bits, &size);
> > >>
> > >> +static const struct common_reset_data ti_reset_data = {
> > >> +       .reset_op_available = false,
> > >> +       .reset_bits = "ti, reset-bits",
> > >                             ^
> > > That space doesn't belong there.
> > > 
> > >> +};
> > >> +
> > >> +static const struct common_reset_data mediatek_reset_data = {
> > >> +       .reset_op_available = true,
> > >> +       .reset_bits = "mediatek, reset-bits",
> > >> +};
> > > 
> > > I understand Robs comments as meaning "ti,reset-bits" should have been
> > > called "reset-bits" in the first place, and you shouldn't repeat adding
> > > the vendor prefix, as that is implied by the compatible. So this should
> > > probably be just "reset-bits".
> > 
> > Hmm, not sure about that. I think Rob wants the reset data itself to be added in
> > the driver as is being done on some other SoCs (eg: like in reset-qcom-pdc.c).
> > 
> > regards
> > Suman
> > 
> Hi Rob,
> 
> Can you help to comment about this point?
> Modify "ti,reset-bits" to "reset-bits" or add "mediatek,reset-bits" ?
> 
> Many thanks~
> Crystal
> 
> > > 
> > > Otherwise this looks like it should work.
> > > 
> > > regards
> > > Philipp
> > > 
> > 

Dears,

I have uploaded the changes at
https://patchwork.kernel.org/cover/11805937/
Please help me to review, many thanks~~

regards
Crystal
> 


  reply	other threads:[~2020-09-29 13:54 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-17  3:03 [v4,0/4] introduce TI reset controller for MT8192 SoC Crystal Guo
2020-08-17  3:03 ` [v4,1/4] dt-binding: reset-controller: ti: add reset-duration-us property Crystal Guo
2020-08-25 17:42   ` Rob Herring
2020-08-26 11:09     ` Crystal Guo
2020-08-17  3:03 ` [v4,2/4] dt-binding: reset-controller: ti: add 'mediatek,infra-reset' to compatible Crystal Guo
2020-08-25 19:02   ` Rob Herring
2020-08-26 11:09     ` Crystal Guo
2020-09-02 23:25       ` Suman Anna
2020-09-08 18:49         ` Rob Herring
2020-09-09 15:10           ` Suman Anna
2020-09-09 18:20             ` Rob Herring
2020-08-17  3:03 ` [v4,3/4] reset-controller: ti: introduce a new reset handler Crystal Guo
2020-09-02 23:40   ` Suman Anna
2020-09-09  2:57     ` Crystal Guo
2020-09-09 15:39       ` Suman Anna
2020-09-11  2:42         ` Crystal Guo
2020-09-11  2:52           ` Suman Anna
2020-09-11  6:07             ` Crystal Guo
2020-09-11 14:26               ` Philipp Zabel
2020-09-11 14:44                 ` Suman Anna
2020-09-14 14:00                   ` Crystal Guo
2020-09-29 13:54                     ` Crystal Guo [this message]
2020-08-17  3:03 ` [v4,4/4] arm64: dts: mt8192: add infracfg_rst node Crystal Guo
2020-09-02 23:29   ` Suman Anna
2020-09-08 13:26     ` Crystal Guo
2020-09-08 15:51       ` Suman Anna
     [not found] ` <5065a23627a34212aa62df646dbf00ee@mtkmbs05n1.mediatek.inc>
2020-09-02  3:03   ` [v4,0/4] introduce TI reset controller for MT8192 SoC Crystal Guo

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