From: Yong Wu <yong.wu@mediatek.com>
To: Will Deacon <will@kernel.org>
Cc: Joerg Roedel <joro@8bytes.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
Evan Green <evgreen@chromium.org>, Tomasz Figa <tfiga@google.com>,
<linux-mediatek@lists.infradead.org>,
<srv_heupstream@mediatek.com>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<iommu@lists.linux-foundation.org>, <youlin.pei@mediatek.com>,
Nicolas Boichat <drinkcat@chromium.org>, <anan.sun@mediatek.com>,
<chao.hao@mediatek.com>, <ming-fan.chen@mediatek.com>,
Greg Kroah-Hartman <gregkh@google.com>, <kernel-team@android.com>
Subject: Re: [PATCH v3 11/24] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek
Date: Mon, 26 Oct 2020 15:45:34 +0800 [thread overview]
Message-ID: <1603698334.26323.88.camel@mhfsdcap03> (raw)
In-Reply-To: <20201023112148.GB20933@willie-the-truck>
On Fri, 2020-10-23 at 12:21 +0100, Will Deacon wrote:
> On Wed, Sep 30, 2020 at 03:06:34PM +0800, Yong Wu wrote:
> > The standard input iova bits is 32. MediaTek quad the lvl1 pagetable
> > (4 * lvl1). No change for lvl2 pagetable. Then the iova bits can reach
> > 34bit.
> >
> > Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> > ---
> > drivers/iommu/io-pgtable-arm-v7s.c | 13 ++++++++++---
> > drivers/iommu/mtk_iommu.c | 2 +-
> > 2 files changed, 11 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/iommu/io-pgtable-arm-v7s.c b/drivers/iommu/io-pgtable-arm-v7s.c
> > index 8362fdf76657..306bae2755ed 100644
> > --- a/drivers/iommu/io-pgtable-arm-v7s.c
> > +++ b/drivers/iommu/io-pgtable-arm-v7s.c
> > @@ -50,10 +50,17 @@
> > */
> > #define ARM_V7S_ADDR_BITS 32
>
> If we rename this to _ARM_V7S_ADDR_BITS can we then have ARM_V7S_ADDR_BITS
> take a cfg parameter and move the arm_v7s_is_mtk_enabled() check in there?
> Same for _ARM_V7S_LVL_BITS.
>
> That would avoid scattering arm_v7s_is_mtk_enabled() into all the users.
I added "cfg" for _ARM_V7S_LVL_BITS in Robin's mail. is that ok?
Regarding ARM_V7S_ADDR_BITS, I'd like to keep it as is(Don't add cfg),
this macro only is used in ARM_V7S_LVL_SHIFT and checking the value of
ias/oas.
a) ARM_V7S_LVL_SHIFT always expect ARM_V7S_ADDR_BITS is 32.
b) our ias/oas is different(ias is 34 while oas is 35). If we define a
new macro, we need two about this, like:
#define ARM_V7S_IADDR_BITS(cfg) (!arm_v7s_is_mtk_enabled(cfg) ? 32 : 34)
#define ARM_V7S_OADDR_BITS(cfg) (!arm_v7s_is_mtk_enabled(cfg) ? 32 : 35)
and the two will only are used in the checking of ias/oas.
thus it looks unnecessary?
>
> Will
next prev parent reply other threads:[~2020-10-26 7:45 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-30 7:06 [PATCH v3 00/24] MT8192 IOMMU support Yong Wu
2020-09-30 7:06 ` [PATCH v3 01/24] dt-bindings: iommu: mediatek: Convert IOMMU to DT schema Yong Wu
2020-10-02 10:58 ` Krzysztof Kozlowski
2020-10-02 11:07 ` Krzysztof Kozlowski
2020-10-06 4:26 ` Yong Wu
2020-10-12 17:08 ` Krzysztof Kozlowski
2020-10-13 7:53 ` Yong Wu
2020-09-30 7:06 ` [PATCH v3 02/24] dt-bindings: memory: mediatek: Convert SMI " Yong Wu
2020-10-02 11:04 ` Krzysztof Kozlowski
2020-10-02 11:08 ` Krzysztof Kozlowski
2020-10-06 4:27 ` Yong Wu
2020-10-06 7:15 ` Krzysztof Kozlowski
2020-10-10 6:18 ` Yong Wu
2020-10-12 7:18 ` Krzysztof Kozlowski
2020-10-12 12:01 ` Yong Wu
2020-10-12 13:26 ` Krzysztof Kozlowski
2020-10-13 7:53 ` Yong Wu
2020-09-30 7:06 ` [PATCH v3 03/24] dt-bindings: memory: mediatek: Add a common larb-port header file Yong Wu
2020-09-30 7:06 ` [PATCH v3 04/24] dt-bindings: memory: mediatek: Extend LARB_NR_MAX to 32 Yong Wu
2020-09-30 7:06 ` [PATCH v3 05/24] dt-bindings: memory: mediatek: Add domain definition Yong Wu
2020-09-30 7:06 ` [PATCH v3 06/24] dt-bindings: mediatek: Add binding for mt8192 IOMMU Yong Wu
2020-10-02 11:10 ` Krzysztof Kozlowski
2020-10-06 4:26 ` Yong Wu
2020-10-06 7:19 ` Krzysztof Kozlowski
2020-09-30 7:06 ` [PATCH v3 07/24] iommu/mediatek: Use the common mtk-smi-larb-port.h Yong Wu
2020-09-30 7:06 ` [PATCH v3 08/24] iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap Yong Wu
2020-10-23 11:17 ` Will Deacon
2020-10-26 7:49 ` Yong Wu
2020-09-30 7:06 ` [PATCH v3 09/24] iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek Yong Wu
2020-10-23 11:22 ` Will Deacon
2020-09-30 7:06 ` [PATCH v3 10/24] iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros Yong Wu
2020-10-23 11:23 ` Will Deacon
2020-09-30 7:06 ` [PATCH v3 11/24] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek Yong Wu
2020-10-23 11:21 ` Will Deacon
2020-10-26 7:45 ` Yong Wu [this message]
2020-10-23 14:10 ` Robin Murphy
2020-10-26 7:41 ` Yong Wu
2020-10-26 11:35 ` Robin Murphy
2020-09-30 7:06 ` [PATCH v3 12/24] iommu/mediatek: Move hw_init into attach_device Yong Wu
2020-09-30 7:06 ` [PATCH v3 13/24] iommu/mediatek: Add device link for smi-common and m4u Yong Wu
2020-09-30 7:06 ` [PATCH v3 14/24] iommu/mediatek: Add pm runtime callback Yong Wu
2020-09-30 7:06 ` [PATCH v3 15/24] iommu/mediatek: Add power-domain operation Yong Wu
2020-09-30 7:06 ` [PATCH v3 16/24] iommu/mediatek: Add iova reserved function Yong Wu
2020-09-30 7:06 ` [PATCH v3 17/24] iommu/mediatek: Add single domain Yong Wu
2020-09-30 7:06 ` [PATCH v3 18/24] iommu/mediatek: Support master use iova over 32bit Yong Wu
2020-10-06 7:18 ` Krzysztof Kozlowski
2020-09-30 7:06 ` [PATCH v3 19/24] iommu/mediatek: Support up to 34bit iova in tlb flush Yong Wu
2020-09-30 7:06 ` [PATCH v3 20/24] iommu/mediatek: Support report iova 34bit translation fault in ISR Yong Wu
2020-09-30 7:06 ` [PATCH v3 21/24] iommu/mediatek: Add support for multi domain Yong Wu
2020-09-30 7:06 ` [PATCH v3 22/24] iommu/mediatek: Adjust the structure Yong Wu
2020-09-30 7:06 ` [PATCH v3 23/24] iommu/mediatek: Add mt8192 support Yong Wu
2020-09-30 7:06 ` [PATCH v3 24/24] memory: mtk-smi: " Yong Wu
2020-10-02 11:15 ` Krzysztof Kozlowski
2020-10-26 20:08 ` [PATCH v3 00/24] MT8192 IOMMU support Krzysztof Kozlowski
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