From: Abel Vesa <abel.vesa@nxp.com>
To: Mike Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Lucas Stach <l.stach@pengutronix.de>,
Rob Herring <robh@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <kernel@pengutronix.de>,
Fabio Estevam <fabio.estevam@nxp.com>,
Anson Huang <anson.huang@nxp.com>, Jacky Bai <ping.bai@nxp.com>,
Peng Fan <peng.fan@nxp.com>, Dong Aisheng <aisheng.dong@nxp.com>
Cc: NXP Linux Team <linux-imx@nxp.com>,
linux-arm-kernel@lists.infradead.org,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
Abel Vesa <abel.vesa@nxp.com>
Subject: [PATCH v2 2/5] clk: imx: gate2: Keep the register writing in on place
Date: Wed, 28 Oct 2020 14:58:59 +0200 [thread overview]
Message-ID: <1603889942-27026-3-git-send-email-abel.vesa@nxp.com> (raw)
In-Reply-To: <1603889942-27026-1-git-send-email-abel.vesa@nxp.com>
Move all the register writing to the newly added clk_gate2_do_shared_clks
and call that everywhere need needed. Cleans up the code a little bit.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
drivers/clk/imx/clk-gate2.c | 33 ++++++++++++++++-----------------
1 file changed, 16 insertions(+), 17 deletions(-)
diff --git a/drivers/clk/imx/clk-gate2.c b/drivers/clk/imx/clk-gate2.c
index 49952ee..e1f6cd9 100644
--- a/drivers/clk/imx/clk-gate2.c
+++ b/drivers/clk/imx/clk-gate2.c
@@ -37,10 +37,21 @@ struct clk_gate2 {
#define to_clk_gate2(_hw) container_of(_hw, struct clk_gate2, hw)
+static void clk_gate2_do_shared_clks(struct clk_hw *hw, bool enable)
+{
+ struct clk_gate2 *gate = to_clk_gate2(hw);
+ u32 reg;
+
+ reg = readl(gate->reg);
+ reg &= ~(3 << gate->bit_idx);
+ if (enable)
+ reg |= gate->cgr_val << gate->bit_idx;
+ writel(reg, gate->reg);
+}
+
static int clk_gate2_enable(struct clk_hw *hw)
{
struct clk_gate2 *gate = to_clk_gate2(hw);
- u32 reg;
unsigned long flags;
int ret = 0;
@@ -49,11 +60,7 @@ static int clk_gate2_enable(struct clk_hw *hw)
if (gate->share_count && (*gate->share_count)++ > 0)
goto out;
- reg = readl(gate->reg);
- reg &= ~(3 << gate->bit_idx);
- reg |= gate->cgr_val << gate->bit_idx;
- writel(reg, gate->reg);
-
+ clk_gate2_do_shared_clks(hw, true);
out:
spin_unlock_irqrestore(gate->lock, flags);
@@ -63,7 +70,6 @@ static int clk_gate2_enable(struct clk_hw *hw)
static void clk_gate2_disable(struct clk_hw *hw)
{
struct clk_gate2 *gate = to_clk_gate2(hw);
- u32 reg;
unsigned long flags;
spin_lock_irqsave(gate->lock, flags);
@@ -75,10 +81,7 @@ static void clk_gate2_disable(struct clk_hw *hw)
goto out;
}
- reg = readl(gate->reg);
- reg &= ~(3 << gate->bit_idx);
- writel(reg, gate->reg);
-
+ clk_gate2_do_shared_clks(hw, false);
out:
spin_unlock_irqrestore(gate->lock, flags);
}
@@ -104,15 +107,11 @@ static void clk_gate2_disable_unused(struct clk_hw *hw)
{
struct clk_gate2 *gate = to_clk_gate2(hw);
unsigned long flags;
- u32 reg;
spin_lock_irqsave(gate->lock, flags);
- if (!gate->share_count || *gate->share_count == 0) {
- reg = readl(gate->reg);
- reg &= ~(3 << gate->bit_idx);
- writel(reg, gate->reg);
- }
+ if (!gate->share_count || *gate->share_count == 0)
+ clk_gate2_do_shared_clks(hw, false);
spin_unlock_irqrestore(gate->lock, flags);
}
--
2.7.4
next prev parent reply other threads:[~2020-10-28 22:25 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-28 12:58 [PATCH v2 0/5] Fix the gate2 and make it more flexible Abel Vesa
2020-10-28 12:58 ` [PATCH v2 1/5] clk: imx: gate2: Remove the IMX_CLK_GATE2_SINGLE_BIT special case Abel Vesa
2020-10-28 12:58 ` Abel Vesa [this message]
2020-10-28 12:59 ` [PATCH v2 3/5] clk: imx: gate2: Check if clock is enabled against cgr_val Abel Vesa
2020-10-28 12:59 ` [PATCH v2 4/5] clk: imx: gate2: Add cgr_mask for more flexible number of control bits Abel Vesa
2020-10-28 12:59 ` [PATCH v2 5/5] clk: imx: gate2: Add locking in is_enabled op Abel Vesa
2020-10-29 7:35 ` [PATCH v2 0/5] Fix the gate2 and make it more flexible Sascha Hauer
2020-11-02 23:56 ` Shawn Guo
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