From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: <skomatineni@nvidia.com>, <thierry.reding@gmail.com>,
<jonathanh@nvidia.com>, <robh+dt@kernel.org>
Cc: <pchandru@nvidia.com>, <devicetree@vger.kernel.org>,
<linux-ide@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH v3 5/6] arm64: tegra: Enable AHCI on Jetson TX2
Date: Mon, 23 Nov 2020 12:17:24 -0800 [thread overview]
Message-ID: <1606162645-22326-6-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1606162645-22326-1-git-send-email-skomatineni@nvidia.com>
This patch enables AHCI on Jetson TX2.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts | 4 ++++
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 28 ++++++++++++++++++++++
2 files changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
index c28d51c..6fd2e05 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
@@ -285,6 +285,10 @@
};
};
+ sata@3507000 {
+ status = "okay";
+ };
+
gpio-keys {
compatible = "gpio-keys";
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 98544d1..a303f45 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -1503,6 +1503,34 @@
};
};
+ sata@3507000 {
+ compatible = "nvidia,tegra186-ahci";
+ reg = <0x0 0x03507000 0x0 0x00002000>, /* AHCI */
+ <0x0 0x03500000 0x0 0x00007000>, /* SATA */
+ <0x0 0x03A90000 0x0 0x00010000>; /* SATA AUX */
+ interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
+
+ power-domains = <&bpmp TEGRA186_POWER_DOMAIN_SAX>;
+ interconnects = <&mc TEGRA186_MEMORY_CLIENT_SATAR &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_SATAW &emc>;
+ interconnect-names = "dma-mem", "write";
+ iommus = <&smmu TEGRA186_SID_SATA>;
+
+ clocks = <&bpmp TEGRA186_CLK_SATA>,
+ <&bpmp TEGRA186_CLK_SATA_OOB>;
+ clock-names = "sata", "sata-oob";
+ assigned-clocks = <&bpmp TEGRA186_CLK_SATA>,
+ <&bpmp TEGRA186_CLK_SATA_OOB>;
+ assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLP_OUT0>,
+ <&bpmp TEGRA186_CLK_PLLP>;
+ assigned-clock-rates = <102000000>,
+ <204000000>;
+ resets = <&bpmp TEGRA186_RESET_SATA>,
+ <&bpmp TEGRA186_RESET_SATACOLD>;
+ reset-names = "sata", "sata-cold";
+ status = "disabled";
+ };
+
bpmp: bpmp {
compatible = "nvidia,tegra186-bpmp";
interconnects = <&mc TEGRA186_MEMORY_CLIENT_BPMPR &emc>,
--
2.7.4
next prev parent reply other threads:[~2020-11-23 20:17 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-23 20:17 [PATCH v3 0/6] Add AHCI support for Tegra186 Sowjanya Komatineni
2020-11-23 20:17 ` [PATCH v3 1/6] arm: tegra: Change order of SATA resets for Tegra124 Sowjanya Komatineni
2020-11-23 20:17 ` [PATCH v3 2/6] arm64: tegra: Change order of SATA resets for Tegra132 and Tegra210 Sowjanya Komatineni
2020-11-23 20:17 ` [PATCH v3 3/6] dt-bindings: ata: tegra: Convert binding documentation to YAML Sowjanya Komatineni
2020-12-07 22:51 ` Rob Herring
2020-11-23 20:17 ` [PATCH v3 4/6] dt-binding: ata: tegra: Add dt-binding documentation for Tegra186 Sowjanya Komatineni
2020-11-23 20:17 ` Sowjanya Komatineni [this message]
2020-11-23 20:17 ` [PATCH v3 6/6] ata: ahci_tegra: Add AHCI support " Sowjanya Komatineni
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