From: Yong Wu <yong.wu@mediatek.com>
To: Robin Murphy <robin.murphy@arm.com>
Cc: Joerg Roedel <joro@8bytes.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Rob Herring <robh+dt@kernel.org>, Will Deacon <will@kernel.org>,
<youlin.pei@mediatek.com>, <devicetree@vger.kernel.org>,
Nicolas Boichat <drinkcat@chromium.org>,
<srv_heupstream@mediatek.com>, <chao.hao@mediatek.com>,
<kernel-team@android.com>, <linux-kernel@vger.kernel.org>,
Evan Green <evgreen@chromium.org>,
"Tomasz Figa" <tfiga@google.com>,
<iommu@lists.linux-foundation.org>,
<linux-mediatek@lists.infradead.org>,
Krzysztof Kozlowski <krzk@kernel.org>, <anan.sun@mediatek.com>,
Greg Kroah-Hartman <gregkh@google.com>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v4 09/24] iommu/io-pgtable-arm-v7s: Clear LVL_SHIFT/BITS macro instead of the formula
Date: Fri, 27 Nov 2020 14:21:19 +0800 [thread overview]
Message-ID: <1606458079.26323.191.camel@mhfsdcap03> (raw)
In-Reply-To: <13599074-25d5-721f-ea7b-1ea6badfd14f@arm.com>
On Thu, 2020-11-26 at 16:03 +0000, Robin Murphy wrote:
> On 2020-11-11 12:38, Yong Wu wrote:
> > The current _ARM_V7S_LVL_BITS/ARM_V7S_LVL_SHIFT use a formula to calculate
> > the corresponding value for level1 and level2 to pretend the code sane.
> > Actually their level1 and level2 values are different from each other.
> > This patch only clear the two macro. No functional change.
>
> Grammar nit: to "clear" the macro sounds like you're making it empty or
> removing it entirely; I think you mean to say "clarify" here. English is
> the worst language sometimes... :)
Thanks for the review. Feel free to tell me if some words is not fit:)
I will use "clarify" in the title.
>
> Reviewed-by: Robin Murphy <robin.murphy@arm.com>
>
> > Suggested-by: Robin Murphy <robin.murphy@arm.com>
> > Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> > ---
> > drivers/iommu/io-pgtable-arm-v7s.c | 8 +++-----
> > 1 file changed, 3 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/iommu/io-pgtable-arm-v7s.c b/drivers/iommu/io-pgtable-arm-v7s.c
> > index 4d0aa079470f..58cc201c10a3 100644
> > --- a/drivers/iommu/io-pgtable-arm-v7s.c
> > +++ b/drivers/iommu/io-pgtable-arm-v7s.c
> > @@ -44,13 +44,11 @@
> >
> > /*
> > * We have 32 bits total; 12 bits resolved at level 1, 8 bits at level 2,
> > - * and 12 bits in a page. With some carefully-chosen coefficients we can
> > - * hide the ugly inconsistencies behind these macros and at least let the
> > - * rest of the code pretend to be somewhat sane.
> > + * and 12 bits in a page.
> > */
> > #define ARM_V7S_ADDR_BITS 32
> > -#define _ARM_V7S_LVL_BITS(lvl) (16 - (lvl) * 4)
> > -#define ARM_V7S_LVL_SHIFT(lvl) (ARM_V7S_ADDR_BITS - (4 + 8 * (lvl)))
> > +#define _ARM_V7S_LVL_BITS(lvl) ((lvl) == 1 ? 12 : 8)
> > +#define ARM_V7S_LVL_SHIFT(lvl) ((lvl) == 1 ? 20 : 12)
> > #define ARM_V7S_TABLE_SHIFT 10
> >
> > #define ARM_V7S_PTES_PER_LVL(lvl) (1 << _ARM_V7S_LVL_BITS(lvl))
> >
next prev parent reply other threads:[~2020-11-27 6:21 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-11 12:38 [PATCH v4 00/24] MT8192 IOMMU support Yong Wu
2020-11-11 12:38 ` [PATCH v4 01/24] dt-bindings: iommu: mediatek: Convert IOMMU to DT schema Yong Wu
2020-11-16 17:43 ` Rob Herring
2020-11-11 12:38 ` [PATCH v4 02/24] dt-bindings: memory: mediatek: Add a common larb-port header file Yong Wu
2020-11-11 21:30 ` Krzysztof Kozlowski
2020-11-11 12:38 ` [PATCH v4 03/24] dt-bindings: memory: mediatek: Extend LARB_NR_MAX to 32 Yong Wu
2020-11-11 21:30 ` Krzysztof Kozlowski
2020-11-11 12:38 ` [PATCH v4 04/24] dt-bindings: memory: mediatek: Add domain definition Yong Wu
2020-11-11 21:30 ` Krzysztof Kozlowski
2020-11-16 17:44 ` Rob Herring
2020-11-11 12:38 ` [PATCH v4 05/24] dt-bindings: mediatek: Add binding for mt8192 IOMMU Yong Wu
2020-11-11 21:33 ` Krzysztof Kozlowski
2020-11-12 2:41 ` Yong Wu
2020-11-11 12:38 ` [PATCH v4 06/24] iommu/mediatek: Use the common mtk-smi-larb-port.h Yong Wu
2020-11-11 21:33 ` Krzysztof Kozlowski
2020-11-11 12:38 ` [PATCH v4 07/24] iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap Yong Wu
2020-11-26 15:41 ` Robin Murphy
2020-11-11 12:38 ` [PATCH v4 08/24] iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek Yong Wu
2020-11-26 15:49 ` Robin Murphy
2020-11-11 12:38 ` [PATCH v4 09/24] iommu/io-pgtable-arm-v7s: Clear LVL_SHIFT/BITS macro instead of the formula Yong Wu
2020-11-26 16:03 ` Robin Murphy
2020-11-27 6:21 ` Yong Wu [this message]
2020-11-11 12:38 ` [PATCH v4 10/24] iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros Yong Wu
2020-11-26 16:09 ` Robin Murphy
2020-11-11 12:38 ` [PATCH v4 11/24] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek Yong Wu
2020-11-26 16:15 ` Robin Murphy
2020-11-11 12:38 ` [PATCH v4 12/24] iommu/mediatek: Move hw_init into attach_device Yong Wu
2020-11-26 16:43 ` Robin Murphy
2020-11-27 6:23 ` Yong Wu
2020-11-11 12:38 ` [PATCH v4 13/24] iommu/mediatek: Add device link for smi-common and m4u Yong Wu
2020-11-12 1:10 ` Nicolas Boichat
2020-11-12 2:42 ` Yong Wu
2020-11-11 12:38 ` [PATCH v4 14/24] iommu/mediatek: Add pm runtime callback Yong Wu
2020-11-11 12:38 ` [PATCH v4 15/24] iommu/mediatek: Add power-domain operation Yong Wu
2020-11-11 12:38 ` [PATCH v4 16/24] iommu/mediatek: Add iova reserved function Yong Wu
2020-11-11 12:38 ` [PATCH v4 17/24] iommu/mediatek: Add single domain Yong Wu
2020-11-26 17:11 ` Robin Murphy
2020-11-27 6:21 ` Yong Wu
2020-11-11 12:38 ` [PATCH v4 18/24] iommu/mediatek: Support master use iova over 32bit Yong Wu
2020-11-11 21:34 ` Krzysztof Kozlowski
2020-11-11 12:38 ` [PATCH v4 19/24] iommu/mediatek: Support up to 34bit iova in tlb flush Yong Wu
2020-11-11 12:38 ` [PATCH v4 20/24] iommu/mediatek: Support report iova 34bit translation fault in ISR Yong Wu
2020-11-11 12:38 ` [PATCH v4 21/24] iommu/mediatek: Add support for multi domain Yong Wu
2020-11-11 12:38 ` [PATCH v4 22/24] iommu/mediatek: Adjust the structure Yong Wu
2020-11-11 12:38 ` [PATCH v4 23/24] iommu/mediatek: Add mt8192 support Yong Wu
2020-11-11 12:38 ` [PATCH v4 24/24] MAINTAINERS: Add entry for MediaTek IOMMU Yong Wu
2020-11-11 16:52 ` Chun-Kuang Hu
2020-11-25 12:23 ` [PATCH v4 00/24] MT8192 IOMMU support Will Deacon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1606458079.26323.191.camel@mhfsdcap03 \
--to=yong.wu@mediatek.com \
--cc=anan.sun@mediatek.com \
--cc=chao.hao@mediatek.com \
--cc=devicetree@vger.kernel.org \
--cc=drinkcat@chromium.org \
--cc=evgreen@chromium.org \
--cc=gregkh@google.com \
--cc=iommu@lists.linux-foundation.org \
--cc=joro@8bytes.org \
--cc=kernel-team@android.com \
--cc=krzk@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=matthias.bgg@gmail.com \
--cc=robh+dt@kernel.org \
--cc=robin.murphy@arm.com \
--cc=srv_heupstream@mediatek.com \
--cc=tfiga@google.com \
--cc=will@kernel.org \
--cc=youlin.pei@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).