From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AF091C433DB for ; Thu, 24 Dec 2020 06:09:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 679F322BF3 for ; Thu, 24 Dec 2020 06:09:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726258AbgLXGJm (ORCPT ); Thu, 24 Dec 2020 01:09:42 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:59098 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725811AbgLXGJm (ORCPT ); Thu, 24 Dec 2020 01:09:42 -0500 X-UUID: daa7748e44764aafa99fc174bc7257a7-20201224 X-UUID: daa7748e44764aafa99fc174bc7257a7-20201224 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1238430578; Thu, 24 Dec 2020 14:08:58 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 24 Dec 2020 14:08:58 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 24 Dec 2020 14:08:58 +0800 From: Henry Chen To: Georgi Djakov , Rob Herring , Matthias Brugger , Stephen Boyd , Ryan Case , Mark Brown CC: Mark Rutland , Nicolas Boichat , Fan Chen , James Liao , Arvin Wang , , , , , , Henry Chen Subject: [PATCH V6 09/13] arm64: dts: mt8183: add dvfsrc related nodes Date: Thu, 24 Dec 2020 14:08:50 +0800 Message-ID: <1608790134-27425-10-git-send-email-henryc.chen@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1608790134-27425-1-git-send-email-henryc.chen@mediatek.com> References: <1608790134-27425-1-git-send-email-henryc.chen@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DDR EMI provider dictating dram interconnect bus performance found on MT8183-based platforms Signed-off-by: Henry Chen --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 06ef8e0..22b3a68 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -11,6 +11,7 @@ #include #include #include "mt8183-pinfunc.h" +#include / { compatible = "mediatek,mt8183"; @@ -331,6 +332,7 @@ ddr_emi: dvfsrc@10012000 { compatible = "mediatek,mt8183-dvfsrc"; reg = <0 0x10012000 0 0x1000>; + #interconnect-cells = <1>; }; pwrap: pwrap@1000d000 { -- 1.9.1