From: "周琰杰 (Zhou Yanjie)" <zhouyanjie@wanyeetech.com>
To: linus.walleij@linaro.org, robh+dt@kernel.org, paul@crapouillou.net
Cc: linux-mips@vger.kernel.org, linux-gpio@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
hns@goldelico.com, paul@boddie.org.uk, dongsheng.qiu@ingenic.com,
aric.pzqi@ingenic.com, sernia.zhou@foxmail.com
Subject: [PATCH 2/3] dt-bindings: pinctrl: Add bindings for new Ingenic SoCs.
Date: Wed, 10 Mar 2021 00:40:56 +0800 [thread overview]
Message-ID: <1615308057-88387-3-git-send-email-zhouyanjie@wanyeetech.com> (raw)
In-Reply-To: <1615308057-88387-1-git-send-email-zhouyanjie@wanyeetech.com>
Add the pinctrl bindings for the JZ4730 SoC, the JZ4750 SoC,
the JZ4755 SoC, the JZ4775 SoC and the X2000 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
---
.../bindings/pinctrl/ingenic,pinctrl.yaml | 23 ++++++++++++++++++----
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml
index 44c04d1..60604fc 100644
--- a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml
@@ -17,10 +17,12 @@ description: >
naming scheme "PxN" where x is a character identifying the GPIO port with
which the pin is associated and N is an integer from 0 to 31 identifying the
pin within that GPIO port. For example PA0 is the first pin in GPIO port A,
- and PB31 is the last pin in GPIO port B. The JZ4740, the X1000 and the X1830
- contains 4 GPIO ports, PA to PD, for a total of 128 pins. The JZ4760, the
- JZ4770 and the JZ4780 contains 6 GPIO ports, PA to PF, for a total of 192
- pins.
+ and PB31 is the last pin in GPIO port B. The JZ4730, the JZ4740, the X1000
+ and the X1830 contains 4 GPIO ports, PA to PD, for a total of 128 pins. The
+ X2000 contains 5 GPIO ports, PA to PE, for a total of 160 pins. The JZ4750,
+ the JZ4755 the JZ4760, the JZ4770 and the JZ4780 contains 6 GPIO ports, PA
+ to PF, for a total of 192 pins. The JZ4775 contains 7 GPIO ports, PA to PG,
+ for a total of 224 pins.
maintainers:
- Paul Cercueil <paul@crapouillou.net>
@@ -32,20 +34,28 @@ properties:
compatible:
oneOf:
- enum:
+ - ingenic,jz4730-pinctrl
- ingenic,jz4740-pinctrl
- ingenic,jz4725b-pinctrl
+ - ingenic,jz4750-pinctrl
+ - ingenic,jz4755-pinctrl
- ingenic,jz4760-pinctrl
- ingenic,jz4770-pinctrl
+ - ingenic,jz4775-pinctrl
- ingenic,jz4780-pinctrl
- ingenic,x1000-pinctrl
- ingenic,x1500-pinctrl
- ingenic,x1830-pinctrl
+ - ingenic,x2000-pinctrl
- items:
- const: ingenic,jz4760b-pinctrl
- const: ingenic,jz4760-pinctrl
- items:
- const: ingenic,x1000e-pinctrl
- const: ingenic,x1000-pinctrl
+ - items:
+ - const: ingenic,x2000e-pinctrl
+ - const: ingenic,x2000-pinctrl
reg:
maxItems: 1
@@ -62,14 +72,19 @@ patternProperties:
properties:
compatible:
enum:
+ - ingenic,jz4730-gpio
- ingenic,jz4740-gpio
- ingenic,jz4725b-gpio
+ - ingenic,jz4750-gpio
+ - ingenic,jz4755-gpio
- ingenic,jz4760-gpio
- ingenic,jz4770-gpio
+ - ingenic,jz4775-gpio
- ingenic,jz4780-gpio
- ingenic,x1000-gpio
- ingenic,x1500-gpio
- ingenic,x1830-gpio
+ - ingenic,x2000-gpio
reg:
items:
--
2.7.4
next prev parent reply other threads:[~2021-03-09 16:42 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-09 16:40 [PATCH 0/3] Fix bugs and add support for new Ingenic SoCs 周琰杰 (Zhou Yanjie)
2021-03-09 16:40 ` [PATCH 1/3] pinctrl: Ingenic: Fix bug and reformat the code 周琰杰 (Zhou Yanjie)
2021-03-10 14:03 ` Andy Shevchenko
2021-03-10 14:19 ` Paul Cercueil
2021-03-10 14:28 ` Zhou Yanjie
2021-03-10 14:27 ` Zhou Yanjie
2021-03-09 16:40 ` 周琰杰 (Zhou Yanjie) [this message]
2021-03-09 16:40 ` [PATCH 3/3] pinctrl: Ingenic: Add support for new Ingenic SoCs 周琰杰 (Zhou Yanjie)
2021-03-10 8:23 ` [kbuild] " Dan Carpenter
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