From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <chunkuang.hu@kernel.org>, <matthias.bgg@gmail.com>
Cc: <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
Rex-BC Chen <rex-bc.chen@mediatek.com>,
Pi-Hsun Shih <pihsun@chromium.org>,
Jitao Shi <jitao.shi@mediatek.com>
Subject: [v5,1/2] drm/mediatek: mtk_dpi: Add check for max clock rate in mode_valid
Date: Thu, 18 Mar 2021 13:40:55 +0800 [thread overview]
Message-ID: <1616046056-29068-2-git-send-email-rex-bc.chen@mediatek.com> (raw)
In-Reply-To: <1616046056-29068-1-git-send-email-rex-bc.chen@mediatek.com>
Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid.
Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org>
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index b05f900d9322..0b427ad0cd9b 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -120,6 +120,7 @@ struct mtk_dpi_yc_limit {
struct mtk_dpi_conf {
unsigned int (*cal_factor)(int clock);
u32 reg_h_fre_con;
+ u32 max_clock_khz;
bool edge_sel_en;
};
@@ -557,9 +558,23 @@ static void mtk_dpi_bridge_enable(struct drm_bridge *bridge)
mtk_dpi_set_display_mode(dpi, &dpi->mode);
}
+static enum drm_mode_status
+mtk_dpi_bridge_mode_valid(struct drm_bridge *bridge,
+ const struct drm_display_info *info,
+ const struct drm_display_mode *mode)
+{
+ struct mtk_dpi *dpi = bridge_to_dpi(bridge);
+
+ if (dpi->conf->max_clock_khz && mode->clock > dpi->conf->max_clock_khz)
+ return MODE_CLOCK_HIGH;
+
+ return MODE_OK;
+}
+
static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
.attach = mtk_dpi_bridge_attach,
.mode_set = mtk_dpi_bridge_mode_set,
+ .mode_valid = mtk_dpi_bridge_mode_valid,
.disable = mtk_dpi_bridge_disable,
.enable = mtk_dpi_bridge_enable,
};
@@ -668,17 +683,20 @@ static unsigned int mt8183_calculate_factor(int clock)
static const struct mtk_dpi_conf mt8173_conf = {
.cal_factor = mt8173_calculate_factor,
.reg_h_fre_con = 0xe0,
+ .max_clock_khz = 300000,
};
static const struct mtk_dpi_conf mt2701_conf = {
.cal_factor = mt2701_calculate_factor,
.reg_h_fre_con = 0xb0,
.edge_sel_en = true,
+ .max_clock_khz = 150000,
};
static const struct mtk_dpi_conf mt8183_conf = {
.cal_factor = mt8183_calculate_factor,
.reg_h_fre_con = 0xe0,
+ .max_clock_khz = 100000,
};
static int mtk_dpi_probe(struct platform_device *pdev)
--
2.18.0
next prev parent reply other threads:[~2021-03-18 5:42 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-18 5:40 [v5,0/2] Add check for max clock rate in mode_valid Rex-BC Chen
2021-03-18 5:40 ` Rex-BC Chen [this message]
2021-03-18 14:24 ` [v5, 1/2] drm/mediatek: mtk_dpi: " Enric Balletbo Serra
2021-03-20 7:06 ` Chun-Kuang Hu
2021-03-18 5:40 ` [v5,2/2] drm/mediatek: mtk_dpi: Add dpi config for mt8192 Rex-BC Chen
2021-03-18 12:54 ` [v5,0/2] Add check for max clock rate in mode_valid Chun-Kuang Hu
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