From: Robin Gong <yibin.gong@nxp.com>
To: vkoul@kernel.org, mark.rutland@arm.com, broonie@kernel.org,
robh+dt@kernel.org, catalin.marinas@arm.com, will.deacon@arm.com,
shawnguo@kernel.org, festevam@gmail.com, s.hauer@pengutronix.de,
martin.fuzzey@flowbird.group, u.kleine-koenig@pengutronix.de,
dan.j.williams@intel.com, matthias.schiffer@ew.tq-group.com,
frieder.schrempf@kontron.de, m.felsch@pengutronix.de,
l.stach@pengutronix.de, xiaoning.wang@nxp.com
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-spi@vger.kernel.org, linux-imx@nxp.com,
kernel@pengutronix.de, dmaengine@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v15 08/12] spi: imx: remove ERR009165 workaround on i.mx6ul
Date: Wed, 14 Jul 2021 02:41:45 +0800 [thread overview]
Message-ID: <1626201709-19643-9-git-send-email-yibin.gong@nxp.com> (raw)
In-Reply-To: <1626201709-19643-1-git-send-email-yibin.gong@nxp.com>
ERR009165 fixed on i.mx6ul/6ull/6sll. All other i.mx6/7 and
i.mx8m/8mm still need this errata. Please refer to nxp official
errata document from https://www.nxp.com/ .
For removing workaround on those chips. Add new i.mx6ul type.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Acked-by: Mark Brown <broonie@kernel.org>
---
drivers/spi/spi-imx.c | 39 ++++++++++++++++++++++++++++++++++++---
1 file changed, 36 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index 61e4fa0..63a8d7b 100644
--- a/drivers/spi/spi-imx.c
+++ b/drivers/spi/spi-imx.c
@@ -77,6 +77,11 @@ struct spi_imx_devtype_data {
bool has_slavemode;
unsigned int fifo_size;
bool dynamic_burst;
+ /*
+ * ERR009165 fixed or not:
+ * https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf
+ */
+ bool tx_glitch_fixed;
enum spi_imx_devtype devtype;
};
@@ -608,8 +613,14 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx,
ctrl |= mx51_ecspi_clkdiv(spi_imx, spi_imx->spi_bus_clk, &clk);
spi_imx->spi_bus_clk = clk;
- /* ERR009165: work in XHC mode as PIO */
- ctrl &= ~MX51_ECSPI_CTRL_SMC;
+ /*
+ * ERR009165: work in XHC mode instead of SMC as PIO on the chips
+ * before i.mx6ul.
+ */
+ if (spi_imx->usedma && spi_imx->devtype_data->tx_glitch_fixed)
+ ctrl |= MX51_ECSPI_CTRL_SMC;
+ else
+ ctrl &= ~MX51_ECSPI_CTRL_SMC;
writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL);
@@ -618,12 +629,16 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx,
static void mx51_setup_wml(struct spi_imx_data *spi_imx)
{
+ u32 tx_wml = 0;
+
+ if (spi_imx->devtype_data->tx_glitch_fixed)
+ tx_wml = spi_imx->wml;
/*
* Configure the DMA register: setup the watermark
* and enable DMA request.
*/
writel(MX51_ECSPI_DMA_RX_WML(spi_imx->wml - 1) |
- MX51_ECSPI_DMA_TX_WML(0) |
+ MX51_ECSPI_DMA_TX_WML(tx_wml) |
MX51_ECSPI_DMA_RXT_WML(spi_imx->wml) |
MX51_ECSPI_DMA_TEDEN | MX51_ECSPI_DMA_RXDEN |
MX51_ECSPI_DMA_RXTDEN, spi_imx->base + MX51_ECSPI_DMA);
@@ -1014,6 +1029,23 @@ static struct spi_imx_devtype_data imx53_ecspi_devtype_data = {
.devtype = IMX53_ECSPI,
};
+static struct spi_imx_devtype_data imx6ul_ecspi_devtype_data = {
+ .intctrl = mx51_ecspi_intctrl,
+ .prepare_message = mx51_ecspi_prepare_message,
+ .prepare_transfer = mx51_ecspi_prepare_transfer,
+ .trigger = mx51_ecspi_trigger,
+ .rx_available = mx51_ecspi_rx_available,
+ .reset = mx51_ecspi_reset,
+ .setup_wml = mx51_setup_wml,
+ .fifo_size = 64,
+ .has_dmamode = true,
+ .dynamic_burst = true,
+ .has_slavemode = true,
+ .tx_glitch_fixed = true,
+ .disable = mx51_ecspi_disable,
+ .devtype = IMX51_ECSPI,
+};
+
static const struct of_device_id spi_imx_dt_ids[] = {
{ .compatible = "fsl,imx1-cspi", .data = &imx1_cspi_devtype_data, },
{ .compatible = "fsl,imx21-cspi", .data = &imx21_cspi_devtype_data, },
@@ -1022,6 +1054,7 @@ static const struct of_device_id spi_imx_dt_ids[] = {
{ .compatible = "fsl,imx35-cspi", .data = &imx35_cspi_devtype_data, },
{ .compatible = "fsl,imx51-ecspi", .data = &imx51_ecspi_devtype_data, },
{ .compatible = "fsl,imx53-ecspi", .data = &imx53_ecspi_devtype_data, },
+ { .compatible = "fsl,imx6ul-ecspi", .data = &imx6ul_ecspi_devtype_data, },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, spi_imx_dt_ids);
--
2.7.4
next prev parent reply other threads:[~2021-07-13 10:26 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-13 18:41 [PATCH v15 00/12] add ecspi ERR009165 for i.mx6/7 soc family Robin Gong
2021-07-13 18:41 ` [PATCH v15 01/12] Revert "ARM: dts: imx6q: Use correct SDMA script for SPI5 core" Robin Gong
2021-07-13 18:41 ` [PATCH v15 02/12] Revert "ARM: dts: imx6: Use correct SDMA script for SPI cores" Robin Gong
2021-07-13 18:41 ` [PATCH v15 03/12] Revert "dmaengine: imx-sdma: refine to load context only once" Robin Gong
2021-07-13 18:41 ` [PATCH v15 04/12] dmaengine: imx-sdma: remove duplicated sdma_load_context Robin Gong
2021-07-13 18:41 ` [PATCH v15 05/12] dmaengine: dma: imx-sdma: add fw_loaded and is_ram_script Robin Gong
2021-07-13 10:34 ` Lucas Stach
2021-07-13 18:41 ` [PATCH v15 06/12] dmaengine: imx-sdma: add mcu_2_ecspi script Robin Gong
2021-07-13 18:41 ` [PATCH v15 07/12] spi: imx: fix ERR009165 Robin Gong
2021-07-13 18:41 ` Robin Gong [this message]
2021-07-13 10:34 ` [PATCH v15 08/12] spi: imx: remove ERR009165 workaround on i.mx6ul Lucas Stach
2021-07-13 18:41 ` [PATCH v15 09/12] dmaengine: imx-sdma: remove ERR009165 " Robin Gong
2021-07-13 10:36 ` Lucas Stach
2021-07-13 18:41 ` [PATCH v15 10/12] dma: imx-sdma: add i.mx6ul compatible name Robin Gong
2021-07-13 18:41 ` [PATCH v15 11/12] dmaengine: imx-sdma: add uart rom script Robin Gong
2022-04-01 16:51 ` Russell King (Oracle)
2021-07-13 18:41 ` [PATCH v15 12/12] dmaengine: imx-sdma: add terminated list for freed descriptor in worker Robin Gong
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