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* [PATCH] arm64: dts: socfpga: agilex5: fix gpio0 address
@ 2025-02-12 10:01 niravkumar.l.rabara
  2025-02-12 15:31 ` Krzysztof Kozlowski
  0 siblings, 1 reply; 3+ messages in thread
From: niravkumar.l.rabara @ 2025-02-12 10:01 UTC (permalink / raw)
  To: Dinh Nguyen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	niravkumar.l.rabara, nirav.rabara, devicetree, linux-kernel
  Cc: stable

From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>

Fix gpio0 controller address for Agilex5.

Fixes: 3f7c869e143a ("arm64: dts: socfpga: agilex5: Add gpio0 node and spi dma handshake id")
Cc: stable@vger.kernel.org
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
---
 arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index 51c6e19e40b8..9e4ef24c8318 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -222,7 +222,7 @@ i3c1: i3c@10da1000 {
 			status = "disabled";
 		};
 
-		gpio0: gpio@ffc03200 {
+		gpio0: gpio@10c03200 {
 			compatible = "snps,dw-apb-gpio";
 			reg = <0xffc03200 0x100>;
 			#address-cells = <1>;
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] arm64: dts: socfpga: agilex5: fix gpio0 address
  2025-02-12 10:01 [PATCH] arm64: dts: socfpga: agilex5: fix gpio0 address niravkumar.l.rabara
@ 2025-02-12 15:31 ` Krzysztof Kozlowski
  2025-02-12 16:03   ` Rabara, Niravkumar L
  0 siblings, 1 reply; 3+ messages in thread
From: Krzysztof Kozlowski @ 2025-02-12 15:31 UTC (permalink / raw)
  To: niravkumar.l.rabara, Dinh Nguyen, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, nirav.rabara, devicetree,
	linux-kernel
  Cc: stable

On 12/02/2025 11:01, niravkumar.l.rabara@intel.com wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> 
> Fix gpio0 controller address for Agilex5.

How do you fix it exactly?

> 
> Fixes: 3f7c869e143a ("arm64: dts: socfpga: agilex5: Add gpio0 node and spi dma handshake id")
> Cc: stable@vger.kernel.org
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> ---
>  arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> index 51c6e19e40b8..9e4ef24c8318 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> @@ -222,7 +222,7 @@ i3c1: i3c@10da1000 {
>  			status = "disabled";
>  		};
>  
> -		gpio0: gpio@ffc03200 {
> +		gpio0: gpio@10c03200 {

I see now warning. Are you sure you tested it according to
maintainer-soc-clean-dts profile?

>  			compatible = "snps,dw-apb-gpio";
>  			reg = <0xffc03200 0x100>;
>  			#address-cells = <1>;


Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 3+ messages in thread

* RE: [PATCH] arm64: dts: socfpga: agilex5: fix gpio0 address
  2025-02-12 15:31 ` Krzysztof Kozlowski
@ 2025-02-12 16:03   ` Rabara, Niravkumar L
  0 siblings, 0 replies; 3+ messages in thread
From: Rabara, Niravkumar L @ 2025-02-12 16:03 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Dinh Nguyen, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, nirav.rabara@altera.com,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
  Cc: stable@vger.kernel.org



> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@kernel.org>
> Sent: Wednesday, 12 February, 2025 11:32 PM
> To: Rabara, Niravkumar L <niravkumar.l.rabara@intel.com>; Dinh Nguyen
> <dinguyen@kernel.org>; Rob Herring <robh@kernel.org>; Krzysztof Kozlowski
> <krzk+dt@kernel.org>; Conor Dooley <conor+dt@kernel.org>;
> nirav.rabara@altera.com; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org
> Cc: stable@vger.kernel.org
> Subject: Re: [PATCH] arm64: dts: socfpga: agilex5: fix gpio0 address
> 
> On 12/02/2025 11:01, niravkumar.l.rabara@intel.com wrote:
> > From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> >
> > Fix gpio0 controller address for Agilex5.
> 
> How do you fix it exactly?

gpio0 address is incorrect here.  
0xffc03200 address is for Agilex7 not for Agilex5.
0x10c03200 is correct address for Agilex5. 
 
I will update the commit message.
"Fix incorrect gpio0 address for Agilex5".  

> 
> >
> > Fixes: 3f7c869e143a ("arm64: dts: socfpga: agilex5: Add gpio0 node and
> > spi dma handshake id")
> > Cc: stable@vger.kernel.org
> > Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> > ---
> >  arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> > b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> > index 51c6e19e40b8..9e4ef24c8318 100644
> > --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> > +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> > @@ -222,7 +222,7 @@ i3c1: i3c@10da1000 {
> >  			status = "disabled";
> >  		};
> >
> > -		gpio0: gpio@ffc03200 {
> > +		gpio0: gpio@10c03200 {
> 
> I see now warning. Are you sure you tested it according to maintainer-soc-
> clean-dts profile?
> 

My bad, I have submitted incorrect patch. 
It supposes to have these changes, I will update in v2.  

-               gpio0: gpio@ffc03200 {
+               gpio0: gpio@10c03200 {
                        compatible = "snps,dw-apb-gpio";
-                       reg = <0xffc03200 0x100>;
+                       reg = <0x10c03200 0x100>;

Thanks,
Nirav

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2025-02-12 16:04 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2025-02-12 10:01 [PATCH] arm64: dts: socfpga: agilex5: fix gpio0 address niravkumar.l.rabara
2025-02-12 15:31 ` Krzysztof Kozlowski
2025-02-12 16:03   ` Rabara, Niravkumar L

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