From: Prasad Malisetty <pmaliset@codeaurora.org>
To: agross@kernel.org, bjorn.andersson@linaro.org,
bhelgaas@google.com, robh+dt@kernel.org, swboyd@chromium.org,
lorenzo.pieralisi@arm.com, svarbanov@mm-sol.com
Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org,
dianders@chromium.org, mka@chromium.org, vbadigan@codeaurora.org,
sallenki@codeaurora.org, manivannan.sadhasivam@linaro.org,
Prasad Malisetty <pmaliset@codeaurora.org>
Subject: [PATCH v9 3/4] arm64: dts: qcom: sc7280: Add PCIe nodes for IDP board
Date: Tue, 28 Sep 2021 19:25:49 +0530 [thread overview]
Message-ID: <1632837350-12100-4-git-send-email-pmaliset@codeaurora.org> (raw)
In-Reply-To: <1632837350-12100-1-git-send-email-pmaliset@codeaurora.org>
Enable PCIe controller and PHY for sc7280 IDP board.
Add specific NVMe GPIO entries for SKU1 and SKU2 support.
Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org>
---
arch/arm64/boot/dts/qcom/sc7280-idp.dts | 9 ++++++
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 54 ++++++++++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/sc7280-idp2.dts | 9 ++++++
3 files changed, 72 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
index 64fc22a..1562386 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
@@ -61,6 +61,15 @@
modem-init;
};
+&nvme_pwren_pin {
+ pins = "gpio19";
+};
+
+&nvme_3v3_regulators {
+ gpio = <&tlmm 19 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+};
+
&pmk8350_vadc {
pmr735a_die_temp {
reg = <PMR735A_ADC7_DIE_TEMP>;
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index def22ff..5b5505f 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -31,6 +31,17 @@
linux,can-disable;
};
};
+
+ nvme_3v3_regulators: nvme-3v3-regulators {
+ compatible = "regulator-fixed";
+ regulator-name = "VLDO_3V3";
+
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&nvme_pwren_pin>;
+ };
};
&apps_rsc {
@@ -220,6 +231,42 @@
modem-init;
};
+&pcie1 {
+ status = "okay";
+ perst-gpio = <&tlmm 2 GPIO_ACTIVE_LOW>;
+
+ vddpe-3v3-supply = <&nvme_3v3_regulators>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie1_default_state>;
+};
+
+&pcie1_phy {
+ status = "okay";
+
+ vdda-phy-supply = <&vreg_l10c_0p8>;
+ vdda-pll-supply = <&vreg_l6b_1p2>;
+};
+
+&pcie1_default_state {
+ reset-n {
+ pins = "gpio2";
+ function = "gpio";
+
+ drive-strength = <16>;
+ output-low;
+ bias-disable;
+ };
+
+ wake-n {
+ pins = "gpio3";
+ function = "gpio";
+
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+};
+
&pmk8350_vadc {
pmk8350_die_temp {
reg = <PMK8350_ADC7_DIE_TEMP>;
@@ -489,3 +536,10 @@
bias-pull-up;
};
};
+
+&tlmm {
+ nvme_pwren_pin: nvme-pwren-pin {
+ function = "gpio";
+ bias-pull-up;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp2.dts b/arch/arm64/boot/dts/qcom/sc7280-idp2.dts
index 1fc2add..0548cb6 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp2.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp2.dts
@@ -21,3 +21,12 @@
stdout-path = "serial0:115200n8";
};
};
+
+&nvme_pwren_pin {
+ pins = "gpio51";
+};
+
+&nvme_3v3_regulators {
+ gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+};
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2021-09-28 13:56 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-28 13:55 [PATCH v9 0/4] Add DT bindings and DT nodes for PCIe and PHY in SC7280 Prasad Malisetty
2021-09-28 13:55 ` [PATCH v9 1/4] dt-bindings: pci: qcom: Document PCIe bindings for SC7280 Prasad Malisetty
2021-09-28 13:55 ` [PATCH v9 2/4] arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes Prasad Malisetty
2021-09-28 13:55 ` Prasad Malisetty [this message]
2021-09-28 20:52 ` [PATCH v9 3/4] arm64: dts: qcom: sc7280: Add PCIe nodes for IDP board Stephen Boyd
2021-09-29 15:53 ` Prasad Malisetty
2021-10-01 4:29 ` Prasad Malisetty
2021-09-28 13:55 ` [PATCH v9 4/4] PCI: qcom: Switch pcie_1_pipe_clk_src after PHY init in SC7280 Prasad Malisetty
2021-09-28 16:21 ` Bjorn Helgaas
2021-09-29 15:51 ` Prasad Malisetty
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