From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A7D8C433F5 for ; Fri, 29 Oct 2021 10:39:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 47A9C61130 for ; Fri, 29 Oct 2021 10:39:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231817AbhJ2Klm (ORCPT ); Fri, 29 Oct 2021 06:41:42 -0400 Received: from mx.socionext.com ([202.248.49.38]:15671 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231755AbhJ2Kll (ORCPT ); Fri, 29 Oct 2021 06:41:41 -0400 Received: from unknown (HELO iyokan2-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 29 Oct 2021 19:39:11 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by iyokan2-ex.css.socionext.com (Postfix) with ESMTP id D6489207616C; Fri, 29 Oct 2021 19:39:11 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Fri, 29 Oct 2021 19:39:11 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id 508D1B62E0; Fri, 29 Oct 2021 19:39:11 +0900 (JST) From: Kunihiko Hayashi To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Masami Hiramatsu Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH v3 5/8] phy: uniphier-pcie: Set VCOPLL clamp mode in PHY register Date: Fri, 29 Oct 2021 19:39:04 +0900 Message-Id: <1635503947-18250-6-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1635503947-18250-1-git-send-email-hayashi.kunihiko@socionext.com> References: <1635503947-18250-1-git-send-email-hayashi.kunihiko@socionext.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Set VCOPLL clamp mode to mode 0 to avoid hardware unstable issue. Signed-off-by: Kunihiko Hayashi --- drivers/phy/socionext/phy-uniphier-pcie.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/phy/socionext/phy-uniphier-pcie.c b/drivers/phy/socionext/phy-uniphier-pcie.c index fde8aac5f4b6..2bd8df619712 100644 --- a/drivers/phy/socionext/phy-uniphier-pcie.c +++ b/drivers/phy/socionext/phy-uniphier-pcie.c @@ -51,6 +51,9 @@ #define PCL_PHY_R26 26 #define VCO_CTRL GENMASK(7, 4) /* Tx VCO adjustment value */ #define VCO_CTRL_INIT_VAL 5 +#define PCL_PHY_R28 28 +#define VCOPLL_CLMP GENMASK(3, 2) /* Tx VCOPLL clamp mode */ +#define VCOPLL_CLMP_VAL 0 struct uniphier_pciephy_priv { void __iomem *base; @@ -158,6 +161,8 @@ static int uniphier_pciephy_init(struct phy *phy) FIELD_PREP(RX_EQ_ADJ, RX_EQ_ADJ_VAL)); uniphier_pciephy_set_param(priv, PCL_PHY_R26, VCO_CTRL, FIELD_PREP(VCO_CTRL, VCO_CTRL_INIT_VAL)); + uniphier_pciephy_set_param(priv, PCL_PHY_R28, VCOPLL_CLMP, + FIELD_PREP(VCOPLL_CLMP, VCOPLL_CLMP_VAL)); usleep_range(1, 10); uniphier_pciephy_deassert(priv); -- 2.7.4