* [PATCH v3 1/4] dt-bindings: Add headers for Tegra234 I2C
2022-01-24 11:18 [PATCH v3 0/4] Add I2C and PWM support for T234 Akhil R
@ 2022-01-24 11:18 ` Akhil R
2022-01-24 11:18 ` [PATCH v3 2/4] arm64: tegra: Add Tegra234 I2C devicetree nodes Akhil R
` (3 subsequent siblings)
4 siblings, 0 replies; 8+ messages in thread
From: Akhil R @ 2022-01-24 11:18 UTC (permalink / raw)
To: devicetree, digetx, jonathanh, ldewangan, linux-i2c, linux-kernel,
linux-tegra, mperttunen, robh+dt, thierry.reding
Cc: akhilrajeev
Add dt-bindings header files for I2C controllers for Tegra234
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
---
include/dt-bindings/clock/tegra234-clock.h | 19 ++++++++++++++++++-
include/dt-bindings/reset/tegra234-reset.h | 8 ++++++++
2 files changed, 26 insertions(+), 1 deletion(-)
diff --git a/include/dt-bindings/clock/tegra234-clock.h b/include/dt-bindings/clock/tegra234-clock.h
index 8d7e66e..dc524e6 100644
--- a/include/dt-bindings/clock/tegra234-clock.h
+++ b/include/dt-bindings/clock/tegra234-clock.h
@@ -20,6 +20,24 @@
#define TEGRA234_CLK_EMC 31U
/** @brief output of gate CLK_ENB_FUSE */
#define TEGRA234_CLK_FUSE 40U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2C1 */
+#define TEGRA234_CLK_I2C1 48U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2C2 */
+#define TEGRA234_CLK_I2C2 49U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2C3 */
+#define TEGRA234_CLK_I2C3 50U
+/** output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2C4 */
+#define TEGRA234_CLK_I2C4 51U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2C6 */
+#define TEGRA234_CLK_I2C6 52U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2C7 */
+#define TEGRA234_CLK_I2C7 53U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2C8 */
+#define TEGRA234_CLK_I2C8 54U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2C9 */
+#define TEGRA234_CLK_I2C9 55U
+/** @brief PLLP clk output */
+#define TEGRA234_CLK_PLLP_OUT0 102U
/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC4 */
#define TEGRA234_CLK_SDMMC4 123U
/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_UARTA */
@@ -30,5 +48,4 @@
#define TEGRA234_CLK_PLLC4 237U
/** @brief 32K input clock provided by PMIC */
#define TEGRA234_CLK_CLK_32K 289U
-
#endif
diff --git a/include/dt-bindings/reset/tegra234-reset.h b/include/dt-bindings/reset/tegra234-reset.h
index 50e13bc..2963259 100644
--- a/include/dt-bindings/reset/tegra234-reset.h
+++ b/include/dt-bindings/reset/tegra234-reset.h
@@ -10,6 +10,14 @@
* @brief Identifiers for Resets controllable by firmware
* @{
*/
+#define TEGRA234_RESET_I2C1 24U
+#define TEGRA234_RESET_I2C2 29U
+#define TEGRA234_RESET_I2C3 30U
+#define TEGRA234_RESET_I2C4 31U
+#define TEGRA234_RESET_I2C6 32U
+#define TEGRA234_RESET_I2C7 33U
+#define TEGRA234_RESET_I2C8 34U
+#define TEGRA234_RESET_I2C9 35U
#define TEGRA234_RESET_SDMMC4 85U
#define TEGRA234_RESET_UARTA 100U
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v3 2/4] arm64: tegra: Add Tegra234 I2C devicetree nodes
2022-01-24 11:18 [PATCH v3 0/4] Add I2C and PWM support for T234 Akhil R
2022-01-24 11:18 ` [PATCH v3 1/4] dt-bindings: Add headers for Tegra234 I2C Akhil R
@ 2022-01-24 11:18 ` Akhil R
2022-01-24 16:48 ` Dmitry Osipenko
2022-01-24 11:18 ` [PATCH v3 3/4] dt-bindings: Add headers for Tegra234 PWM Akhil R
` (2 subsequent siblings)
4 siblings, 1 reply; 8+ messages in thread
From: Akhil R @ 2022-01-24 11:18 UTC (permalink / raw)
To: devicetree, digetx, jonathanh, ldewangan, linux-i2c, linux-kernel,
linux-tegra, mperttunen, robh+dt, thierry.reding
Cc: akhilrajeev
Add device tree nodes for Tegra234 I2C controllers
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra234.dtsi | 121 +++++++++++++++++++++++++++++++
1 file changed, 121 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index 6b6f1580..c686827 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -144,6 +144,96 @@
status = "disabled";
};
+ gen1_i2c: i2c@3160000 {
+ compatible = "nvidia,tegra194-i2c";
+ reg = <0x3160000 0x100>;
+ status = "disabled";
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clock-frequency = <400000>;
+ clocks = <&bpmp TEGRA234_CLK_I2C1
+ &bpmp TEGRA234_CLK_PLLP_OUT0>;
+ assigned-clocks = <&bpmp TEGRA234_CLK_I2C1>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
+ clock-names = "div-clk", "parent";
+ resets = <&bpmp TEGRA234_RESET_I2C1>;
+ reset-names = "i2c";
+ };
+
+ cam_i2c: i2c@3180000 {
+ compatible = "nvidia,tegra194-i2c";
+ reg = <0x3180000 0x100>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ clock-frequency = <400000>;
+ clocks = <&bpmp TEGRA234_CLK_I2C3
+ &bpmp TEGRA234_CLK_PLLP_OUT0>;
+ assigned-clocks = <&bpmp TEGRA234_CLK_I2C3>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
+ clock-names = "div-clk", "parent";
+ resets = <&bpmp TEGRA234_RESET_I2C3>;
+ reset-names = "i2c";
+ };
+
+ dp_aux_ch1_i2c: i2c@3190000 {
+ compatible = "nvidia,tegra194-i2c";
+ reg = <0x3190000 0x100>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ clock-frequency = <100000>;
+ clocks = <&bpmp TEGRA234_CLK_I2C4
+ &bpmp TEGRA234_CLK_PLLP_OUT0>;
+ assigned-clocks = <&bpmp TEGRA234_CLK_I2C4>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
+ clock-names = "div-clk", "parent";
+ resets = <&bpmp TEGRA234_RESET_I2C4>;
+ reset-names = "i2c";
+ };
+
+ dp_aux_ch0_i2c: i2c@31b0000 {
+ compatible = "nvidia,tegra194-i2c";
+ reg = <0x31b0000 0x100>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ clock-frequency = <100000>;
+ clocks = <&bpmp TEGRA234_CLK_I2C6
+ &bpmp TEGRA234_CLK_PLLP_OUT0>;
+ assigned-clocks = <&bpmp TEGRA234_CLK_I2C6>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
+ clock-names = "div-clk", "parent";
+ resets = <&bpmp TEGRA234_RESET_I2C6>;
+ reset-names = "i2c";
+ };
+
+ dp_aux_ch2_i2c: i2c@31c0000 {
+ compatible = "nvidia,tegra194-i2c";
+ reg = <0x31c0000 0x100>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ clock-frequency = <100000>;
+ clocks = <&bpmp TEGRA234_CLK_I2C7
+ &bpmp TEGRA234_CLK_PLLP_OUT0>;
+ assigned-clocks = <&bpmp TEGRA234_CLK_I2C7>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
+ clock-names = "div-clk", "parent";
+ resets = <&bpmp TEGRA234_RESET_I2C7>;
+ reset-names = "i2c";
+ };
+
+ dp_aux_ch3_i2c: i2c@31e0000 {
+ compatible = "nvidia,tegra194-i2c";
+ reg = <0x31e0000 0x100>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ clock-frequency = <100000>;
+ clocks = <&bpmp TEGRA234_CLK_I2C9
+ &bpmp TEGRA234_CLK_PLLP_OUT0>;
+ assigned-clocks = <&bpmp TEGRA234_CLK_I2C9>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
+ clock-names = "div-clk", "parent";
+ resets = <&bpmp TEGRA234_RESET_I2C9>;
+ reset-names = "i2c";
+ };
+
mmc@3460000 {
compatible = "nvidia,tegra234-sdhci", "nvidia,tegra186-sdhci";
reg = <0x03460000 0x20000>;
@@ -212,6 +302,37 @@
#mbox-cells = <2>;
};
+ gen2_i2c: i2c@c240000 {
+ compatible = "nvidia,tegra194-i2c";
+ reg = <0xc240000 0x100>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ clock-frequency = <100000>;
+ clocks = <&bpmp TEGRA234_CLK_I2C2
+ &bpmp TEGRA234_CLK_PLLP_OUT0>;
+ clock-names = "div-clk", "parent";
+ assigned-clocks = <&bpmp TEGRA234_CLK_I2C2>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
+ resets = <&bpmp TEGRA234_RESET_I2C2>;
+ reset-names = "i2c";
+ };
+
+ gen8_i2c: i2c@c250000 {
+ compatible = "nvidia,tegra194-i2c";
+ reg = <0xc250000 0x100>;
+ nvidia,hw-instance-id = <0x7>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ clock-frequency = <400000>;
+ clocks = <&bpmp TEGRA234_CLK_I2C8
+ &bpmp TEGRA234_CLK_PLLP_OUT0>;
+ clock-names = "div-clk", "parent";
+ assigned-clocks = <&bpmp TEGRA234_CLK_I2C8>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
+ resets = <&bpmp TEGRA234_RESET_I2C8>;
+ reset-names = "i2c";
+ };
+
rtc@c2a0000 {
compatible = "nvidia,tegra234-rtc", "nvidia,tegra20-rtc";
reg = <0x0c2a0000 0x10000>;
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v3 2/4] arm64: tegra: Add Tegra234 I2C devicetree nodes
2022-01-24 11:18 ` [PATCH v3 2/4] arm64: tegra: Add Tegra234 I2C devicetree nodes Akhil R
@ 2022-01-24 16:48 ` Dmitry Osipenko
2022-01-25 4:51 ` Akhil R
0 siblings, 1 reply; 8+ messages in thread
From: Dmitry Osipenko @ 2022-01-24 16:48 UTC (permalink / raw)
To: Akhil R, devicetree, jonathanh, ldewangan, linux-i2c,
linux-kernel, linux-tegra, mperttunen, robh+dt, thierry.reding
24.01.2022 14:18, Akhil R пишет:
> Add device tree nodes for Tegra234 I2C controllers
>
> Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
> ---
> arch/arm64/boot/dts/nvidia/tegra234.dtsi | 121 +++++++++++++++++++++++++++++++
> 1 file changed, 121 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> index 6b6f1580..c686827 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> @@ -144,6 +144,96 @@
> status = "disabled";
> };
>
> + gen1_i2c: i2c@3160000 {
> + compatible = "nvidia,tegra194-i2c";
> + reg = <0x3160000 0x100>;
> + status = "disabled";
> + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> + clock-frequency = <400000>;
> + clocks = <&bpmp TEGRA234_CLK_I2C1
> + &bpmp TEGRA234_CLK_PLLP_OUT0>;
> + assigned-clocks = <&bpmp TEGRA234_CLK_I2C1>;
> + assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
> + clock-names = "div-clk", "parent";
> + resets = <&bpmp TEGRA234_RESET_I2C1>;
> + reset-names = "i2c";
> + };
The patchset looks okay to me, thank you. I've one question:
Could you please explain why the "PLLP" I2C timing configuration that is
specified in the "example" section of Tegra TRM isn't suitable for
T194/234? Why I2C Tegra kernel driver uses a different configuration?
^ permalink raw reply [flat|nested] 8+ messages in thread* RE: [PATCH v3 2/4] arm64: tegra: Add Tegra234 I2C devicetree nodes
2022-01-24 16:48 ` Dmitry Osipenko
@ 2022-01-25 4:51 ` Akhil R
0 siblings, 0 replies; 8+ messages in thread
From: Akhil R @ 2022-01-25 4:51 UTC (permalink / raw)
To: Dmitry Osipenko, devicetree@vger.kernel.org, Jonathan Hunter,
Laxman Dewangan, linux-i2c@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org,
Mikko Perttunen, robh+dt@kernel.org, thierry.reding@gmail.com
> 24.01.2022 14:18, Akhil R пишет:
> > Add device tree nodes for Tegra234 I2C controllers
> >
> > Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
> > ---
> > arch/arm64/boot/dts/nvidia/tegra234.dtsi | 121
> > +++++++++++++++++++++++++++++++
> > 1 file changed, 121 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> > b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> > index 6b6f1580..c686827 100644
> > --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> > +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> > @@ -144,6 +144,96 @@
> > status = "disabled";
> > };
> >
> > + gen1_i2c: i2c@3160000 {
> > + compatible = "nvidia,tegra194-i2c";
> > + reg = <0x3160000 0x100>;
> > + status = "disabled";
> > + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> > + clock-frequency = <400000>;
> > + clocks = <&bpmp TEGRA234_CLK_I2C1
> > + &bpmp TEGRA234_CLK_PLLP_OUT0>;
> > + assigned-clocks = <&bpmp TEGRA234_CLK_I2C1>;
> > + assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
> > + clock-names = "div-clk", "parent";
> > + resets = <&bpmp TEGRA234_RESET_I2C1>;
> > + reset-names = "i2c";
> > + };
>
> The patchset looks okay to me, thank you. I've one question:
>
> Could you please explain why the "PLLP" I2C timing configuration that is
> specified in the "example" section of Tegra TRM isn't suitable for T194/234?
> Why I2C Tegra kernel driver uses a different configuration?
The values in TRM are example settings. The values in driver are
more precise values based on characterization test results.
Regards,
Akhil
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v3 3/4] dt-bindings: Add headers for Tegra234 PWM
2022-01-24 11:18 [PATCH v3 0/4] Add I2C and PWM support for T234 Akhil R
2022-01-24 11:18 ` [PATCH v3 1/4] dt-bindings: Add headers for Tegra234 I2C Akhil R
2022-01-24 11:18 ` [PATCH v3 2/4] arm64: tegra: Add Tegra234 I2C devicetree nodes Akhil R
@ 2022-01-24 11:18 ` Akhil R
2022-01-24 11:18 ` [PATCH v3 4/4] arm64: tegra: Add Tegra234 PWM devicetree nodes Akhil R
2022-02-03 17:50 ` [PATCH v3 0/4] Add I2C and PWM support for T234 Thierry Reding
4 siblings, 0 replies; 8+ messages in thread
From: Akhil R @ 2022-01-24 11:18 UTC (permalink / raw)
To: devicetree, digetx, jonathanh, ldewangan, linux-i2c, linux-kernel,
linux-tegra, mperttunen, robh+dt, thierry.reding
Cc: akhilrajeev
Add dt-bindings header files for PWM of Tegra234
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
---
include/dt-bindings/clock/tegra234-clock.h | 16 ++++++++++++++++
include/dt-bindings/reset/tegra234-reset.h | 8 ++++++++
2 files changed, 24 insertions(+)
diff --git a/include/dt-bindings/clock/tegra234-clock.h b/include/dt-bindings/clock/tegra234-clock.h
index dc524e6..2529e7e 100644
--- a/include/dt-bindings/clock/tegra234-clock.h
+++ b/include/dt-bindings/clock/tegra234-clock.h
@@ -38,6 +38,22 @@
#define TEGRA234_CLK_I2C9 55U
/** @brief PLLP clk output */
#define TEGRA234_CLK_PLLP_OUT0 102U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_PWM1 */
+#define TEGRA234_CLK_PWM1 105U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_PWM2 */
+#define TEGRA234_CLK_PWM2 106U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_PWM3 */
+#define TEGRA234_CLK_PWM3 107U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_PWM4 */
+#define TEGRA234_CLK_PWM4 108U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_PWM5 */
+#define TEGRA234_CLK_PWM5 109U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_PWM6 */
+#define TEGRA234_CLK_PWM6 110U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_PWM7 */
+#define TEGRA234_CLK_PWM7 111U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_PWM8 */
+#define TEGRA234_CLK_PWM8 112U
/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC4 */
#define TEGRA234_CLK_SDMMC4 123U
/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_UARTA */
diff --git a/include/dt-bindings/reset/tegra234-reset.h b/include/dt-bindings/reset/tegra234-reset.h
index 2963259..ba390b8 100644
--- a/include/dt-bindings/reset/tegra234-reset.h
+++ b/include/dt-bindings/reset/tegra234-reset.h
@@ -18,6 +18,14 @@
#define TEGRA234_RESET_I2C7 33U
#define TEGRA234_RESET_I2C8 34U
#define TEGRA234_RESET_I2C9 35U
+#define TEGRA234_RESET_PWM1 68U
+#define TEGRA234_RESET_PWM2 69U
+#define TEGRA234_RESET_PWM3 70U
+#define TEGRA234_RESET_PWM4 71U
+#define TEGRA234_RESET_PWM5 72U
+#define TEGRA234_RESET_PWM6 73U
+#define TEGRA234_RESET_PWM7 74U
+#define TEGRA234_RESET_PWM8 75U
#define TEGRA234_RESET_SDMMC4 85U
#define TEGRA234_RESET_UARTA 100U
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v3 4/4] arm64: tegra: Add Tegra234 PWM devicetree nodes
2022-01-24 11:18 [PATCH v3 0/4] Add I2C and PWM support for T234 Akhil R
` (2 preceding siblings ...)
2022-01-24 11:18 ` [PATCH v3 3/4] dt-bindings: Add headers for Tegra234 PWM Akhil R
@ 2022-01-24 11:18 ` Akhil R
2022-02-03 17:50 ` [PATCH v3 0/4] Add I2C and PWM support for T234 Thierry Reding
4 siblings, 0 replies; 8+ messages in thread
From: Akhil R @ 2022-01-24 11:18 UTC (permalink / raw)
To: devicetree, digetx, jonathanh, ldewangan, linux-i2c, linux-kernel,
linux-tegra, mperttunen, robh+dt, thierry.reding
Cc: akhilrajeev
Add device tree nodes for Tegra234 PWM
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra234.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index c686827..cbebf1e 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -234,6 +234,18 @@
reset-names = "i2c";
};
+ pwm1: pwm@3280000 {
+ compatible = "nvidia,tegra194-pwm",
+ "nvidia,tegra186-pwm";
+ reg = <0x3280000 0x10000>;
+ clocks = <&bpmp TEGRA234_CLK_PWM1>;
+ clock-names = "pwm";
+ resets = <&bpmp TEGRA234_RESET_PWM1>;
+ reset-names = "pwm";
+ status = "disabled";
+ #pwm-cells = <2>;
+ };
+
mmc@3460000 {
compatible = "nvidia,tegra234-sdhci", "nvidia,tegra186-sdhci";
reg = <0x03460000 0x20000>;
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v3 0/4] Add I2C and PWM support for T234
2022-01-24 11:18 [PATCH v3 0/4] Add I2C and PWM support for T234 Akhil R
` (3 preceding siblings ...)
2022-01-24 11:18 ` [PATCH v3 4/4] arm64: tegra: Add Tegra234 PWM devicetree nodes Akhil R
@ 2022-02-03 17:50 ` Thierry Reding
4 siblings, 0 replies; 8+ messages in thread
From: Thierry Reding @ 2022-02-03 17:50 UTC (permalink / raw)
To: Akhil R
Cc: devicetree, digetx, jonathanh, ldewangan, linux-i2c, linux-kernel,
linux-tegra, mperttunen, robh+dt
[-- Attachment #1: Type: text/plain, Size: 844 bytes --]
On Mon, Jan 24, 2022 at 04:48:13PM +0530, Akhil R wrote:
> The patchset contains driver and devicetree changes to support I2C and
> PWM for Tegra234
>
> v2->v3:
> * Sorted clock and reset based on ID
> v1->v2:
> * Reverted changes in i2c-tegra.c. using tegra194_i2c_hw for tegra234
> as the values are compatible.
>
> Akhil R (4):
> dt-bindings: Add headers for Tegra234 I2C
> arm64: tegra: Add Tegra234 I2C devicetree nodes
> dt-bindings: Add headers for Tegra234 PWM
> arm64: tegra: Add Tegra234 PWM devicetree nodes
>
> arch/arm64/boot/dts/nvidia/tegra234.dtsi | 133 +++++++++++++++++++++++++++++
> include/dt-bindings/clock/tegra234-clock.h | 35 +++++++-
> include/dt-bindings/reset/tegra234-reset.h | 16 ++++
> 3 files changed, 183 insertions(+), 1 deletion(-)
Applied, thanks.
Thierry
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