From: Ashish Mhetre <amhetre@nvidia.com>
To: <robh+dt@kernel.org>, <krzysztof.kozlowski@canonical.com>,
<thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
<digetx@gmail.com>, <linux-kernel@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>
Cc: <vdumpa@nvidia.com>, <Snikam@nvidia.com>, <amhetre@nvidia.com>
Subject: [Patch v4 3/4] memory: tegra: Add memory controller channels support
Date: Wed, 2 Mar 2022 14:13:28 +0530 [thread overview]
Message-ID: <1646210609-21943-4-git-send-email-amhetre@nvidia.com> (raw)
In-Reply-To: <1646210609-21943-1-git-send-email-amhetre@nvidia.com>
From tegra186 onwards, memory controller support multiple channels.
Add support for mapping address spaces of these channels.
During error interrupts from memory controller, appropriate registers
from these channels need to be accessed for logging error info.
Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
---
drivers/memory/tegra/mc.c | 6 ++++++
drivers/memory/tegra/tegra186.c | 21 +++++++++++++++++++++
drivers/memory/tegra/tegra194.c | 1 +
drivers/memory/tegra/tegra234.c | 1 +
include/soc/tegra/mc.h | 7 +++++++
5 files changed, 36 insertions(+)
diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c
index bf3abb6..3cda1d9 100644
--- a/drivers/memory/tegra/mc.c
+++ b/drivers/memory/tegra/mc.c
@@ -749,6 +749,12 @@ static int tegra_mc_probe(struct platform_device *pdev)
if (IS_ERR(mc->regs))
return PTR_ERR(mc->regs);
+ if (mc->soc->ops && mc->soc->ops->map_regs) {
+ err = mc->soc->ops->map_regs(mc, pdev);
+ if (err < 0)
+ return err;
+ }
+
mc->debugfs.root = debugfs_create_dir("mc", NULL);
if (mc->soc->ops && mc->soc->ops->probe) {
diff --git a/drivers/memory/tegra/tegra186.c b/drivers/memory/tegra/tegra186.c
index 3d15388..59a4425 100644
--- a/drivers/memory/tegra/tegra186.c
+++ b/drivers/memory/tegra/tegra186.c
@@ -139,11 +139,31 @@ static int tegra186_mc_probe_device(struct tegra_mc *mc, struct device *dev)
return 0;
}
+static int tegra186_mc_map_regs(struct tegra_mc *mc,
+ struct platform_device *pdev)
+{
+ struct resource *res;
+ int i;
+
+ mc->mcb_regs = devm_platform_get_and_ioremap_resource(pdev, 1, &res);
+ if (IS_ERR(mc->mcb_regs))
+ return PTR_ERR(mc->mcb_regs);
+
+ for (i = 0; i < mc->soc->num_channels; i++) {
+ mc->mc_regs[i] = devm_platform_get_and_ioremap_resource(pdev, i + 2, &res);
+ if (IS_ERR(mc->mc_regs[i]))
+ return PTR_ERR(mc->mc_regs[i]);
+ }
+
+ return 0;
+}
+
const struct tegra_mc_ops tegra186_mc_ops = {
.probe = tegra186_mc_probe,
.remove = tegra186_mc_remove,
.resume = tegra186_mc_resume,
.probe_device = tegra186_mc_probe_device,
+ .map_regs = tegra186_mc_map_regs,
};
#if defined(CONFIG_ARCH_TEGRA_186_SOC)
@@ -875,6 +895,7 @@ const struct tegra_mc_soc tegra186_mc_soc = {
.num_clients = ARRAY_SIZE(tegra186_mc_clients),
.clients = tegra186_mc_clients,
.num_address_bits = 40,
+ .num_channels = 4,
.ops = &tegra186_mc_ops,
};
#endif
diff --git a/drivers/memory/tegra/tegra194.c b/drivers/memory/tegra/tegra194.c
index cab998b..9400117 100644
--- a/drivers/memory/tegra/tegra194.c
+++ b/drivers/memory/tegra/tegra194.c
@@ -1347,5 +1347,6 @@ const struct tegra_mc_soc tegra194_mc_soc = {
.num_clients = ARRAY_SIZE(tegra194_mc_clients),
.clients = tegra194_mc_clients,
.num_address_bits = 40,
+ .num_channels = 16,
.ops = &tegra186_mc_ops,
};
diff --git a/drivers/memory/tegra/tegra234.c b/drivers/memory/tegra/tegra234.c
index e22824a..6335a13 100644
--- a/drivers/memory/tegra/tegra234.c
+++ b/drivers/memory/tegra/tegra234.c
@@ -97,5 +97,6 @@ const struct tegra_mc_soc tegra234_mc_soc = {
.num_clients = ARRAY_SIZE(tegra234_mc_clients),
.clients = tegra234_mc_clients,
.num_address_bits = 40,
+ .num_channels = 16,
.ops = &tegra186_mc_ops,
};
diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h
index 1066b11..92f810c 100644
--- a/include/soc/tegra/mc.h
+++ b/include/soc/tegra/mc.h
@@ -13,6 +13,9 @@
#include <linux/irq.h>
#include <linux/reset-controller.h>
#include <linux/types.h>
+#include <linux/platform_device.h>
+
+#define MC_MAX_CHANNELS 16
struct clk;
struct device;
@@ -181,6 +184,7 @@ struct tegra_mc_ops {
int (*resume)(struct tegra_mc *mc);
irqreturn_t (*handle_irq)(int irq, void *data);
int (*probe_device)(struct tegra_mc *mc, struct device *dev);
+ int (*map_regs)(struct tegra_mc *mc, struct platform_device *pdev);
};
struct tegra_mc_soc {
@@ -194,6 +198,7 @@ struct tegra_mc_soc {
unsigned int atom_size;
u8 client_id_mask;
+ u8 num_channels;
const struct tegra_smmu_soc *smmu;
@@ -212,6 +217,8 @@ struct tegra_mc {
struct tegra_smmu *smmu;
struct gart_device *gart;
void __iomem *regs;
+ void __iomem *mcb_regs;
+ void __iomem *mc_regs[MC_MAX_CHANNELS];
struct clk *clk;
int irq;
--
2.7.4
next prev parent reply other threads:[~2022-03-02 8:44 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-02 8:43 [Patch v4 0/4] memory: tegra: Add MC channels and error logging Ashish Mhetre
2022-03-02 8:43 ` [Patch v4 1/4] arm64: tegra: Add memory controller channels Ashish Mhetre
2022-03-02 19:32 ` Krzysztof Kozlowski
2022-03-02 8:43 ` [Patch v4 2/4] dt-bindings: memory: Update reg maxitems for tegra186 Ashish Mhetre
2022-03-02 17:51 ` Rob Herring
2022-03-02 19:31 ` Krzysztof Kozlowski
2022-03-02 8:43 ` Ashish Mhetre [this message]
2022-03-02 19:35 ` [Patch v4 3/4] memory: tegra: Add memory controller channels support Krzysztof Kozlowski
2022-03-09 8:56 ` Jon Hunter
2022-03-02 8:43 ` [Patch v4 4/4] memory: tegra: Add MC error logging on tegra186 onward Ashish Mhetre
2022-03-02 19:44 ` Krzysztof Kozlowski
2022-03-07 19:02 ` Ashish Mhetre
2022-03-03 12:31 ` Dan Carpenter
2022-03-03 13:03 ` Krzysztof Kozlowski
2022-03-07 19:47 ` Ashish Mhetre
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