* [PATCH v4 0/2] clk: imx8mp: Add audio shared gate @ 2022-10-28 5:32 Shengjiu Wang 2022-10-28 5:32 ` [PATCH v4 1/2] dt-bindings: clock: imx8mp: Add ids for the " Shengjiu Wang 2022-10-28 5:32 ` [PATCH v4 2/2] clk: imx8mp: Add " Shengjiu Wang 0 siblings, 2 replies; 5+ messages in thread From: Shengjiu Wang @ 2022-10-28 5:32 UTC (permalink / raw) To: shengjiu.wang, abelvesa, mturquette, sboyd, shawnguo, s.hauer, kernel, festevam, linux-imx, robh+dt, krzysztof.kozlowski+dt, linux-clk, linux-arm-kernel, linux-kernel, devicetree, marex changes in v4: - don't remove IMX8MP_CLK_AUDIO_ROOT, to avoid any break changes in v3: - remove IMX8MP_CLK_AUDIO_ROOT changes in v2: - split dt-binding to separate patch Abel Vesa (2): dt-bindings: clock: imx8mp: Add ids for the audio shared gate clk: imx8mp: Add audio shared gate drivers/clk/imx/clk-imx8mp.c | 17 ++++++++++++++++- include/dt-bindings/clock/imx8mp-clock.h | 11 ++++++++++- 2 files changed, 26 insertions(+), 2 deletions(-) -- 2.34.1 ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v4 1/2] dt-bindings: clock: imx8mp: Add ids for the audio shared gate 2022-10-28 5:32 [PATCH v4 0/2] clk: imx8mp: Add audio shared gate Shengjiu Wang @ 2022-10-28 5:32 ` Shengjiu Wang 2022-11-04 21:42 ` Abel Vesa 2022-10-28 5:32 ` [PATCH v4 2/2] clk: imx8mp: Add " Shengjiu Wang 1 sibling, 1 reply; 5+ messages in thread From: Shengjiu Wang @ 2022-10-28 5:32 UTC (permalink / raw) To: shengjiu.wang, abelvesa, mturquette, sboyd, shawnguo, s.hauer, kernel, festevam, linux-imx, robh+dt, krzysztof.kozlowski+dt, linux-clk, linux-arm-kernel, linux-kernel, devicetree, marex From: Abel Vesa <abel.vesa@nxp.com> All these IDs are for one single HW gate (CCGR101) that is shared between these root clocks. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- include/dt-bindings/clock/imx8mp-clock.h | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h index 9d5cc2ddde89..2f6fec299662 100644 --- a/include/dt-bindings/clock/imx8mp-clock.h +++ b/include/dt-bindings/clock/imx8mp-clock.h @@ -324,8 +324,17 @@ #define IMX8MP_CLK_CLKOUT2_SEL 317 #define IMX8MP_CLK_CLKOUT2_DIV 318 #define IMX8MP_CLK_CLKOUT2 319 +#define IMX8MP_CLK_AUDIO_AHB_ROOT 320 +#define IMX8MP_CLK_AUDIO_AXI_ROOT 321 +#define IMX8MP_CLK_SAI1_ROOT 322 +#define IMX8MP_CLK_SAI2_ROOT 323 +#define IMX8MP_CLK_SAI3_ROOT 324 +#define IMX8MP_CLK_SAI5_ROOT 325 +#define IMX8MP_CLK_SAI6_ROOT 326 +#define IMX8MP_CLK_SAI7_ROOT 327 +#define IMX8MP_CLK_PDM_ROOT 328 -#define IMX8MP_CLK_END 320 +#define IMX8MP_CLK_END 329 #define IMX8MP_CLK_AUDIOMIX_SAI1_IPG 0 #define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1 1 -- 2.34.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v4 1/2] dt-bindings: clock: imx8mp: Add ids for the audio shared gate 2022-10-28 5:32 ` [PATCH v4 1/2] dt-bindings: clock: imx8mp: Add ids for the " Shengjiu Wang @ 2022-11-04 21:42 ` Abel Vesa 0 siblings, 0 replies; 5+ messages in thread From: Abel Vesa @ 2022-11-04 21:42 UTC (permalink / raw) To: Shengjiu Wang Cc: shengjiu.wang, abelvesa, mturquette, sboyd, shawnguo, s.hauer, kernel, festevam, linux-imx, robh+dt, krzysztof.kozlowski+dt, linux-clk, linux-arm-kernel, linux-kernel, devicetree, marex On 22-10-28 13:32:23, Shengjiu Wang wrote: > From: Abel Vesa <abel.vesa@nxp.com> > > All these IDs are for one single HW gate (CCGR101) that is shared > between these root clocks. > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com> > Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> > Reviewed-by: Peng Fan <peng.fan@nxp.com> > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> > --- > include/dt-bindings/clock/imx8mp-clock.h | 11 ++++++++++- > 1 file changed, 10 insertions(+), 1 deletion(-) > > diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h > index 9d5cc2ddde89..2f6fec299662 100644 > --- a/include/dt-bindings/clock/imx8mp-clock.h > +++ b/include/dt-bindings/clock/imx8mp-clock.h > @@ -324,8 +324,17 @@ > #define IMX8MP_CLK_CLKOUT2_SEL 317 > #define IMX8MP_CLK_CLKOUT2_DIV 318 > #define IMX8MP_CLK_CLKOUT2 319 > +#define IMX8MP_CLK_AUDIO_AHB_ROOT 320 > +#define IMX8MP_CLK_AUDIO_AXI_ROOT 321 > +#define IMX8MP_CLK_SAI1_ROOT 322 > +#define IMX8MP_CLK_SAI2_ROOT 323 > +#define IMX8MP_CLK_SAI3_ROOT 324 > +#define IMX8MP_CLK_SAI5_ROOT 325 > +#define IMX8MP_CLK_SAI6_ROOT 326 > +#define IMX8MP_CLK_SAI7_ROOT 327 > +#define IMX8MP_CLK_PDM_ROOT 328 > > -#define IMX8MP_CLK_END 320 > +#define IMX8MP_CLK_END 329 > > #define IMX8MP_CLK_AUDIOMIX_SAI1_IPG 0 > #define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1 1 > -- > 2.34.1 > ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v4 2/2] clk: imx8mp: Add audio shared gate 2022-10-28 5:32 [PATCH v4 0/2] clk: imx8mp: Add audio shared gate Shengjiu Wang 2022-10-28 5:32 ` [PATCH v4 1/2] dt-bindings: clock: imx8mp: Add ids for the " Shengjiu Wang @ 2022-10-28 5:32 ` Shengjiu Wang 2022-11-04 21:53 ` Abel Vesa 1 sibling, 1 reply; 5+ messages in thread From: Shengjiu Wang @ 2022-10-28 5:32 UTC (permalink / raw) To: shengjiu.wang, abelvesa, mturquette, sboyd, shawnguo, s.hauer, kernel, festevam, linux-imx, robh+dt, krzysztof.kozlowski+dt, linux-clk, linux-arm-kernel, linux-kernel, devicetree, marex From: Abel Vesa <abel.vesa@nxp.com> According to the RM, the CCGR101 is shared for the following root clocks: - AUDIO_AHB_CLK_ROOT - AUDIO_AXI_CLK_ROOT - SAI1_CLK_ROOT - SAI2_CLK_ROOT - SAI3_CLK_ROOT - SAI5_CLK_ROOT - SAI6_CLK_ROOT - SAI7_CLK_ROOT - PDM_CLK_ROOT And still keep MX8MP_CLK_AUDIO_ROOT clock, even it is duplicate with AUDIO_AHB_CLK_ROOT, that is to avoid break any users. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> --- drivers/clk/imx/clk-imx8mp.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index 652ae58c2735..d9ad09877990 100644 --- a/drivers/clk/imx/clk-imx8mp.c +++ b/drivers/clk/imx/clk-imx8mp.c @@ -17,6 +17,7 @@ static u32 share_count_nand; static u32 share_count_media; +static u32 share_count_audio; static const char * const pll_ref_sels[] = { "osc_24m", "dummy", "dummy", "dummy", }; static const char * const audio_pll1_bypass_sels[] = {"audio_pll1", "audio_pll1_ref_sel", }; @@ -699,7 +700,21 @@ static int imx8mp_clocks_probe(struct platform_device *pdev) hws[IMX8MP_CLK_HDMI_ROOT] = imx_clk_hw_gate4("hdmi_root_clk", "hdmi_axi", ccm_base + 0x45f0, 0); hws[IMX8MP_CLK_TSENSOR_ROOT] = imx_clk_hw_gate4("tsensor_root_clk", "ipg_root", ccm_base + 0x4620, 0); hws[IMX8MP_CLK_VPU_ROOT] = imx_clk_hw_gate4("vpu_root_clk", "vpu_bus", ccm_base + 0x4630, 0); - hws[IMX8MP_CLK_AUDIO_ROOT] = imx_clk_hw_gate4("audio_root_clk", "audio_ahb", ccm_base + 0x4650, 0); + + /* + * IMX8MP_CLK_AUDIO_ROOT is same as IMX8MP_CLK_AUDIO_AHB_ROOT. + * In order to avoid break any users, still keep it. + */ + hws[IMX8MP_CLK_AUDIO_ROOT] = imx_clk_hw_gate2_shared2("audio_root_clk", "audio_ahb", ccm_base + 0x4650, 0, &share_count_audio); + hws[IMX8MP_CLK_AUDIO_AHB_ROOT] = imx_clk_hw_gate2_shared2("audio_ahb_root", "audio_ahb", ccm_base + 0x4650, 0, &share_count_audio); + hws[IMX8MP_CLK_AUDIO_AXI_ROOT] = imx_clk_hw_gate2_shared2("audio_axi_root", "audio_axi", ccm_base + 0x4650, 0, &share_count_audio); + hws[IMX8MP_CLK_SAI1_ROOT] = imx_clk_hw_gate2_shared2("sai1_root", "sai1", ccm_base + 0x4650, 0, &share_count_audio); + hws[IMX8MP_CLK_SAI2_ROOT] = imx_clk_hw_gate2_shared2("sai2_root", "sai2", ccm_base + 0x4650, 0, &share_count_audio); + hws[IMX8MP_CLK_SAI3_ROOT] = imx_clk_hw_gate2_shared2("sai3_root", "sai3", ccm_base + 0x4650, 0, &share_count_audio); + hws[IMX8MP_CLK_SAI5_ROOT] = imx_clk_hw_gate2_shared2("sai5_root", "sai5", ccm_base + 0x4650, 0, &share_count_audio); + hws[IMX8MP_CLK_SAI6_ROOT] = imx_clk_hw_gate2_shared2("sai6_root", "sai6", ccm_base + 0x4650, 0, &share_count_audio); + hws[IMX8MP_CLK_SAI7_ROOT] = imx_clk_hw_gate2_shared2("sai7_root", "sai7", ccm_base + 0x4650, 0, &share_count_audio); + hws[IMX8MP_CLK_PDM_ROOT] = imx_clk_hw_gate2_shared2("pdm_root", "pdm", ccm_base + 0x4650, 0, &share_count_audio); hws[IMX8MP_CLK_ARM] = imx_clk_hw_cpu("arm", "arm_a53_core", hws[IMX8MP_CLK_A53_CORE]->clk, -- 2.34.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v4 2/2] clk: imx8mp: Add audio shared gate 2022-10-28 5:32 ` [PATCH v4 2/2] clk: imx8mp: Add " Shengjiu Wang @ 2022-11-04 21:53 ` Abel Vesa 0 siblings, 0 replies; 5+ messages in thread From: Abel Vesa @ 2022-11-04 21:53 UTC (permalink / raw) To: Shengjiu Wang Cc: shengjiu.wang, abelvesa, mturquette, sboyd, shawnguo, s.hauer, kernel, festevam, linux-imx, robh+dt, krzysztof.kozlowski+dt, linux-clk, linux-arm-kernel, linux-kernel, devicetree, marex On 22-10-28 13:32:24, Shengjiu Wang wrote: > From: Abel Vesa <abel.vesa@nxp.com> > > According to the RM, the CCGR101 is shared for the following root clocks: > - AUDIO_AHB_CLK_ROOT > - AUDIO_AXI_CLK_ROOT > - SAI1_CLK_ROOT > - SAI2_CLK_ROOT > - SAI3_CLK_ROOT > - SAI5_CLK_ROOT > - SAI6_CLK_ROOT > - SAI7_CLK_ROOT > - PDM_CLK_ROOT > > And still keep MX8MP_CLK_AUDIO_ROOT clock, even it is duplicate with > AUDIO_AHB_CLK_ROOT, that is to avoid break any users. > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com> > Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> > Reviewed-by: Peng Fan <peng.fan@nxp.com> > --- > drivers/clk/imx/clk-imx8mp.c | 17 ++++++++++++++++- > 1 file changed, 16 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c > index 652ae58c2735..d9ad09877990 100644 > --- a/drivers/clk/imx/clk-imx8mp.c > +++ b/drivers/clk/imx/clk-imx8mp.c > @@ -17,6 +17,7 @@ > > static u32 share_count_nand; > static u32 share_count_media; > +static u32 share_count_audio; > > static const char * const pll_ref_sels[] = { "osc_24m", "dummy", "dummy", "dummy", }; > static const char * const audio_pll1_bypass_sels[] = {"audio_pll1", "audio_pll1_ref_sel", }; > @@ -699,7 +700,21 @@ static int imx8mp_clocks_probe(struct platform_device *pdev) > hws[IMX8MP_CLK_HDMI_ROOT] = imx_clk_hw_gate4("hdmi_root_clk", "hdmi_axi", ccm_base + 0x45f0, 0); > hws[IMX8MP_CLK_TSENSOR_ROOT] = imx_clk_hw_gate4("tsensor_root_clk", "ipg_root", ccm_base + 0x4620, 0); > hws[IMX8MP_CLK_VPU_ROOT] = imx_clk_hw_gate4("vpu_root_clk", "vpu_bus", ccm_base + 0x4630, 0); > - hws[IMX8MP_CLK_AUDIO_ROOT] = imx_clk_hw_gate4("audio_root_clk", "audio_ahb", ccm_base + 0x4650, 0); > + > + /* > + * IMX8MP_CLK_AUDIO_ROOT is same as IMX8MP_CLK_AUDIO_AHB_ROOT. > + * In order to avoid break any users, still keep it. > + */ > + hws[IMX8MP_CLK_AUDIO_ROOT] = imx_clk_hw_gate2_shared2("audio_root_clk", "audio_ahb", ccm_base + 0x4650, 0, &share_count_audio); > + hws[IMX8MP_CLK_AUDIO_AHB_ROOT] = imx_clk_hw_gate2_shared2("audio_ahb_root", "audio_ahb", ccm_base + 0x4650, 0, &share_count_audio); Please correct me if I'm wrong, but maybe it would make more sense to register just one clock here and then do: #define IMX8MP_CLK_AUDIO_AHB_ROOT IMX8MP_CLK_AUDIO_ROOT in the bindings header file? AFAIK, all consumers use these clocks by their binding ID. > + hws[IMX8MP_CLK_AUDIO_AXI_ROOT] = imx_clk_hw_gate2_shared2("audio_axi_root", "audio_axi", ccm_base + 0x4650, 0, &share_count_audio); > + hws[IMX8MP_CLK_SAI1_ROOT] = imx_clk_hw_gate2_shared2("sai1_root", "sai1", ccm_base + 0x4650, 0, &share_count_audio); > + hws[IMX8MP_CLK_SAI2_ROOT] = imx_clk_hw_gate2_shared2("sai2_root", "sai2", ccm_base + 0x4650, 0, &share_count_audio); > + hws[IMX8MP_CLK_SAI3_ROOT] = imx_clk_hw_gate2_shared2("sai3_root", "sai3", ccm_base + 0x4650, 0, &share_count_audio); > + hws[IMX8MP_CLK_SAI5_ROOT] = imx_clk_hw_gate2_shared2("sai5_root", "sai5", ccm_base + 0x4650, 0, &share_count_audio); > + hws[IMX8MP_CLK_SAI6_ROOT] = imx_clk_hw_gate2_shared2("sai6_root", "sai6", ccm_base + 0x4650, 0, &share_count_audio); > + hws[IMX8MP_CLK_SAI7_ROOT] = imx_clk_hw_gate2_shared2("sai7_root", "sai7", ccm_base + 0x4650, 0, &share_count_audio); > + hws[IMX8MP_CLK_PDM_ROOT] = imx_clk_hw_gate2_shared2("pdm_root", "pdm", ccm_base + 0x4650, 0, &share_count_audio); > > hws[IMX8MP_CLK_ARM] = imx_clk_hw_cpu("arm", "arm_a53_core", > hws[IMX8MP_CLK_A53_CORE]->clk, > -- > 2.34.1 > ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-11-04 21:54 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2022-10-28 5:32 [PATCH v4 0/2] clk: imx8mp: Add audio shared gate Shengjiu Wang 2022-10-28 5:32 ` [PATCH v4 1/2] dt-bindings: clock: imx8mp: Add ids for the " Shengjiu Wang 2022-11-04 21:42 ` Abel Vesa 2022-10-28 5:32 ` [PATCH v4 2/2] clk: imx8mp: Add " Shengjiu Wang 2022-11-04 21:53 ` Abel Vesa
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