From: Mukesh Ojha <quic_mojha@quicinc.com>
To: <agross@kernel.org>, <andersson@kernel.org>,
<konrad.dybcio@linaro.org>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>
Cc: <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
Mukesh Ojha <quic_mojha@quicinc.com>
Subject: [PATCH v2 2/2] arm64: dts: qcom: sm8450: Add TCSR halt register space
Date: Thu, 12 Jan 2023 13:40:14 +0530 [thread overview]
Message-ID: <1673511014-4721-2-git-send-email-quic_mojha@quicinc.com> (raw)
In-Reply-To: <1673511014-4721-1-git-send-email-quic_mojha@quicinc.com>
Add TCSR register space and refer it from scm node, so that
it can be used by SCM driver.
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
---
Changes in v2:
- Added SoC compatible based on comment made by krzysztof in v1.
arch/arm64/boot/dts/qcom/sm8450.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 5704750..8c866e4 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -270,6 +270,7 @@
firmware {
scm: scm {
compatible = "qcom,scm-sm8450", "qcom,scm";
+ qcom,dload-mode = <&tcsr 0x13000>;
interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
#reset-cells = <1>;
};
@@ -1986,6 +1987,11 @@
#hwlock-cells = <1>;
};
+ tcsr: syscon@1fc0000 {
+ compatible = "qcom,tcsr-sm8450", "syscon";
+ reg = <0x0 0x1fc0000 0x0 0x30000>;
+ };
+
usb_1_hsphy: phy@88e3000 {
compatible = "qcom,sm8450-usb-hs-phy",
"qcom,usb-snps-hs-7nm-phy";
--
2.7.4
next prev parent reply other threads:[~2023-01-12 8:11 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-12 8:10 [PATCH v2 1/2] dt-bindings: mfd: qcom,tcsr: Add compatible for sm8450 Mukesh Ojha
2023-01-12 8:10 ` Mukesh Ojha [this message]
2023-01-12 8:30 ` Krzysztof Kozlowski
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