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  • [parent not found: <CAL_JsqLqTHbHjB1qiLduhzvTaO7EBMgL6KYqZJtgStGVGtX1vQ@mail.gmail.com>]
  • * [PATCH v2 2/2] dt-bindings: usb: snps,dwc3: Add 'snps,global-regs-starting-offset' quirk
           [not found] ` <20230412033006.10859-2-stanley_chang@realtek.com>
           [not found]   ` <955cc334-eaac-5880-51cf-8ab171f0ef48@kernel.org>
           [not found]   ` <CAL_JsqLqTHbHjB1qiLduhzvTaO7EBMgL6KYqZJtgStGVGtX1vQ@mail.gmail.com>
    @ 2023-04-13  4:25   ` Stanley Chang
      2023-04-13  7:32     ` Krzysztof Kozlowski
      2023-04-13 13:00     ` Rob Herring
      2 siblings, 2 replies; 12+ messages in thread
    From: Stanley Chang @ 2023-04-13  4:25 UTC (permalink / raw)
      To: Thinh Nguyen
      Cc: Stanley Chang, linux-usb, Greg Kroah-Hartman, linux-kernel,
    	devicetree, Krzysztof Kozlowski, Rob Herring, Felipe Balbi
    
    Add a new 'snps,global-regs-starting-offset' DT to dwc3 core to remap
    the global register start address
    
    The RTK DHC SoCs were designed the global register address offset at
    0x8100. The default address is at DWC3_GLOBALS_REGS_START (0xc100).
    Therefore, add the property of device-tree to adjust this start address.
    
    Signed-off-by: Stanley Chang <stanley_chang@realtek.com>
    ---
     v1 to v2 change:
    1. Change the name of the property "snps,global-regs-starting-offset".
    ---
     Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 7 +++++++
     1 file changed, 7 insertions(+)
    
    diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
    index be36956af53b..5cbf3b7ded04 100644
    --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
    +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
    @@ -359,6 +359,13 @@ properties:
         items:
           enum: [1, 4, 8, 16, 32, 64, 128, 256]
     
    +  snps,global-regs-starting-offset:
    +    description:
    +      value for remapping global register start address. For some dwc3
    +      controller, the dwc3 global register start address is not at
    +      default DWC3_GLOBALS_REGS_START (0xc100). This property is added to
    +      adjust the address.
    +
       port:
         $ref: /schemas/graph.yaml#/properties/port
         description:
    -- 
    2.34.1
    
    
    ^ permalink raw reply related	[flat|nested] 12+ messages in thread

  • end of thread, other threads:[~2023-04-14  9:37 UTC | newest]
    
    Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
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         [not found] <20230412033006.10859-1-stanley_chang@realtek.com>
         [not found] ` <20230412033006.10859-2-stanley_chang@realtek.com>
         [not found]   ` <955cc334-eaac-5880-51cf-8ab171f0ef48@kernel.org>
    2023-04-12 11:11     ` [PATCH v2 2/2] dt-bindings: usb: snps,dwc3: Add 'snps,global-regs-starting-offset' quirk Stanley Chang[昌育德]
    2023-04-12 14:13       ` Krzysztof Kozlowski
         [not found]   ` <CAL_JsqLqTHbHjB1qiLduhzvTaO7EBMgL6KYqZJtgStGVGtX1vQ@mail.gmail.com>
    2023-04-13  2:53     ` Stanley Chang[昌育德]
    2023-04-14  9:08       ` Krzysztof Kozlowski
    2023-04-14  9:36         ` Stanley Chang[昌育德]
    2023-04-13  4:25   ` Stanley Chang
    2023-04-13  7:32     ` Krzysztof Kozlowski
    2023-04-13 14:58       ` Stanley Chang[昌育德]
    2023-04-13 16:36         ` Krzysztof Kozlowski
    2023-04-14  2:12           ` Stanley Chang[昌育德]
    2023-04-14  9:05             ` Krzysztof Kozlowski
    2023-04-13 13:00     ` Rob Herring
    

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