From: Rob Herring <robh@kernel.org>
To: Conor Dooley <conor@kernel.org>
Cc: devicetree@vger.kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, palmer@dabbelt.com,
linux-riscv@lists.infradead.org,
Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH RESEND] dt-bindings: riscv: add sv57 mmu-type
Date: Tue, 25 Apr 2023 13:56:06 -0500 [thread overview]
Message-ID: <168244896648.2081233.16478595076932550051.robh@kernel.org> (raw)
In-Reply-To: <20230424-rival-habitual-478567c516f0@spud>
On Mon, 24 Apr 2023 18:05:43 +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> Dumping the dtb from new versions of QEMU warns that sv57 is an
> undocumented mmu-type. The kernel has supported sv57 for about a year,
> so bring it into the fold.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> Resending with the missing CCs.
> Palmer, you can take this for 6.4 if you want, otherwise I'll grab it
> after the merge window. I doubt there's a rush when it's been missing
> for a year or so.
> ---
> Documentation/devicetree/bindings/riscv/cpus.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
next prev parent reply other threads:[~2023-04-25 18:57 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-24 17:05 [PATCH RESEND] dt-bindings: riscv: add sv57 mmu-type Conor Dooley
2023-04-25 18:56 ` Rob Herring [this message]
2023-04-26 14:30 ` Palmer Dabbelt
2023-04-26 15:57 ` Palmer Dabbelt
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