From: Richard Zhu <hongxing.zhu@nxp.com>
To: frank.li@nxp.com, l.stach@pengutronix.de, shawnguo@kernel.org,
lpieralisi@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org
Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@pengutronix.de,
linux-imx@nxp.com
Subject: [PATCH v2 9/9] PCI: imx6: Add i.MX7D PCIe EP support
Date: Fri, 4 Aug 2023 10:09:35 +0800 [thread overview]
Message-ID: <1691114975-4750-10-git-send-email-hongxing.zhu@nxp.com> (raw)
In-Reply-To: <1691114975-4750-1-git-send-email-hongxing.zhu@nxp.com>
Add the i.MX7D PCIe EP mode support.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 43c5251f5160..af7659712537 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -52,6 +52,7 @@ enum imx6_pcie_variants {
IMX6QP,
IMX6QP_EP,
IMX7D,
+ IMX7D_EP,
IMX8MQ,
IMX8MM,
IMX8MP,
@@ -359,6 +360,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
0);
break;
case IMX7D:
+ case IMX7D_EP:
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, 0);
break;
@@ -590,6 +592,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16);
break;
case IMX7D:
+ case IMX7D_EP:
break;
case IMX8MM:
case IMX8MM_EP:
@@ -638,6 +641,7 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie *imx6_pcie)
IMX6Q_GPR1_PCIE_TEST_PD);
break;
case IMX7D:
+ case IMX7D_EP:
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
IMX7D_GPR12_PCIE_PHY_REFCLK_SEL,
IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);
@@ -711,6 +715,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
{
switch (imx6_pcie->drvdata->variant) {
case IMX7D:
+ case IMX7D_EP:
case IMX8MQ:
case IMX8MQ_EP:
reset_control_assert(imx6_pcie->pciephy_reset);
@@ -763,6 +768,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
reset_control_deassert(imx6_pcie->pciephy_reset);
break;
case IMX7D:
+ case IMX7D_EP:
reset_control_deassert(imx6_pcie->pciephy_reset);
/* Workaround for ERR010728, failure of PCI-e PLL VCO to
@@ -854,6 +860,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev)
IMX6Q_GPR12_PCIE_CTL_2);
break;
case IMX7D:
+ case IMX7D_EP:
case IMX8MQ:
case IMX8MQ_EP:
case IMX8MM:
@@ -880,6 +887,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev)
IMX6Q_GPR12_PCIE_CTL_2, 0);
break;
case IMX7D:
+ case IMX7D_EP:
case IMX8MQ:
case IMX8MQ_EP:
case IMX8MM:
@@ -1385,6 +1393,7 @@ static int imx6_pcie_probe(struct platform_device *pdev)
"pcie_aux clock source missing or invalid\n");
fallthrough;
case IMX7D:
+ case IMX7D_EP:
if (dbi_base->start == IMX8MQ_PCIE2_BASE_ADDR)
imx6_pcie->controller_id = 1;
@@ -1572,6 +1581,12 @@ static const struct imx6_pcie_drvdata drvdata[] = {
.flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND,
.gpr = "fsl,imx7d-iomuxc-gpr",
},
+ [IMX7D_EP] = {
+ .variant = IMX7D_EP,
+ .mode = DW_PCIE_EP_TYPE,
+ .gpr = "fsl,imx7d-iomuxc-gpr",
+ .epc_features = &imx6q_pcie_epc_features,
+ },
[IMX8MQ] = {
.variant = IMX8MQ,
.gpr = "fsl,imx8mq-iomuxc-gpr",
@@ -1611,6 +1626,7 @@ static const struct of_device_id imx6_pcie_of_match[] = {
{ .compatible = "fsl,imx6qp-pcie", .data = &drvdata[IMX6QP], },
{ .compatible = "fsl,imx6qp-pcie-ep", .data = &drvdata[IMX6QP_EP], },
{ .compatible = "fsl,imx7d-pcie", .data = &drvdata[IMX7D], },
+ { .compatible = "fsl,imx7d-pcie-ep", .data = &drvdata[IMX7D_EP], },
{ .compatible = "fsl,imx8mq-pcie", .data = &drvdata[IMX8MQ], },
{ .compatible = "fsl,imx8mm-pcie", .data = &drvdata[IMX8MM], },
{ .compatible = "fsl,imx8mp-pcie", .data = &drvdata[IMX8MP], },
--
2.34.1
prev parent reply other threads:[~2023-08-04 2:44 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-04 2:09 [PATCH v2 0/9] Add legacy i.MX PCIe EP mode supports Richard Zhu
2023-08-04 2:09 ` [PATCH v2 1/9] dt-bindings: PCI: fsl,imx6q: Add i.MX6Q and i.MX6QP PCIe EP compatibles Richard Zhu
2023-08-07 7:03 ` Krzysztof Kozlowski
2023-08-04 2:09 ` [PATCH v2 2/9] dt-bindings: PCI: fsl,imx6q: Add i.MX6SX " Richard Zhu
2023-08-07 7:04 ` Krzysztof Kozlowski
2023-08-04 2:09 ` [PATCH v2 3/9] dt-bindings: PCI: fsl,imx6q: Add i.MX7D " Richard Zhu
2023-08-07 7:04 ` Krzysztof Kozlowski
2023-08-04 2:09 ` [PATCH v2 4/9] arm: dts: nxp: Add i.MX6QDL and i.MX6QP PCIe EP supports Richard Zhu
2023-08-04 2:09 ` [PATCH v2 5/9] arm: dts: nxp: Add i.MX6SX PCIe EP support Richard Zhu
2023-08-04 2:09 ` [PATCH v2 6/9] arm: dts: nxp: Add i.MX7D " Richard Zhu
2023-08-04 2:09 ` [PATCH v2 7/9] PCI: imx6: Add i.MX6Q and i.MX6QP PCIe EP supports Richard Zhu
2023-08-04 2:09 ` [PATCH v2 8/9] PCI: imx6: Add i.MX6SX PCIe EP support Richard Zhu
2023-08-04 2:09 ` Richard Zhu [this message]
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