From: "Heiko Stübner" <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
To: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Ulf Hansson <ulf.hansson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Ziyuan Xu <xzy.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
linux-mmc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Adrian Hunter
<adrian.hunter-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>,
Douglas Anderson
<dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Subject: Re: [PATCH 2/4] mmc: sdhci-of-arasan: Control clock for accessing syscon
Date: Mon, 29 Aug 2016 11:10:05 +0200 [thread overview]
Message-ID: <1693211.KBN6GAFoI7@diego> (raw)
In-Reply-To: <fa7bea7d-b596-5784-4221-de3a8eaf5f17-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Hi Shawn,
Am Montag, 29. August 2016, 16:54:10 schrieb Shawn Lin:
> On 2016/8/29 16:25, Heiko Stübner wrote:
> > Am Montag, 29. August 2016, 16:02:57 schrieb Shawn Lin:
> >> In the eariler commit 65820199272d ("Documentation: mmc:
> >> sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs"), we
> >> introduced syscon to control corecfg_* stuff provided by
> >> arasan. But given that we may need to ungate the clock for
> >> accessing corecfg_*, it not so perfect as it depends on
> >> whether specific clock driver disables it if not referenced.
> >> Meanwhile, if we don't need arasan contoller to work anymore,
> >> there is no reason to still enable it. So let's control this
> >> clock when needed.
> >>
> >> Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> >> ---
> >>
> >> drivers/mmc/host/sdhci-of-arasan.c | 25 ++++++++++++++++++++++---
> >> 1 file changed, 22 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/drivers/mmc/host/sdhci-of-arasan.c
> >> b/drivers/mmc/host/sdhci-of-arasan.c index 0b3a9cf..7ae3ae4 100644
> >> --- a/drivers/mmc/host/sdhci-of-arasan.c
> >> +++ b/drivers/mmc/host/sdhci-of-arasan.c
> >> @@ -78,6 +78,7 @@ struct sdhci_arasan_soc_ctl_map {
> >>
> >> * struct sdhci_arasan_data
> >> * @host: Pointer to the main SDHCI host structure.
> >> * @clk_ahb: Pointer to the AHB clock
> >>
> >> + * @clk_syscon: Pointer to the optional clock for accessing syscon
> >>
> >> * @phy: Pointer to the generic phy
> >> * @is_phy_on: True if the PHY is on; false if not.
> >> * @sdcardclk_hw: Struct for the clock we might provide to a PHY.
> >>
> >> @@ -88,6 +89,7 @@ struct sdhci_arasan_soc_ctl_map {
> >>
> >> struct sdhci_arasan_data {
> >>
> >> struct sdhci_host *host;
> >> struct clk *clk_ahb;
> >>
> >> + struct clk *clk_syscon;
> >>
> >> struct phy *phy;
> >> bool is_phy_on;
> >>
> >> @@ -290,6 +292,7 @@ static int sdhci_arasan_suspend(struct device *dev)
> >>
> >> clk_disable(pltfm_host->clk);
> >> clk_disable(sdhci_arasan->clk_ahb);
> >>
> >> + clk_disable(sdhci_arasan->clk_syscon);
> >>
> >> return 0;
> >>
> >> }
> >>
> >> @@ -309,6 +312,12 @@ static int sdhci_arasan_resume(struct device *dev)
> >>
> >> struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
> >> int ret;
> >>
> >> + ret = clk_enable(sdhci_arasan->clk_syscon);
> >> + if (ret) {
> >> + dev_err(dev, "Cannot enable syscon clock.\n");
> >> + return ret;
> >> + }
> >> +
> >>
> >> ret = clk_enable(sdhci_arasan->clk_ahb);
> >> if (ret) {
> >>
> >> dev_err(dev, "Cannot enable AHB clock.\n");
> >>
> >> @@ -528,26 +537,33 @@ static int sdhci_arasan_probe(struct
> >> platform_device
> >> *pdev) ret);
> >>
> >> goto err_pltfm_free;
> >>
> >> }
> >>
> >> +
> >> + sdhci_arasan->clk_syscon = devm_clk_get(&pdev->dev,
> >> + "clk_syscon");
> >> + if (clk_prepare_enable(sdhci_arasan->clk_syscon)) {
> >> + dev_err(&pdev->dev, "Unable to enable syscon clock.\n");
> >> + goto err_pltfm_free;
> >> + }
> >
> > doesn't look very "optional" to me.
> > clk_get specifies:
> > "Returns a struct clk corresponding to the clock producer, or
> > valid IS_ERR() condition containing errno."
> >
> > So later clk_* on that err_ptr will produce failures and the
> > clock-framework could also request deferal.
>
> Thanks for quick feedback.:)
>
> It makes sense. I think it's just because clk_get request deferral, so
> we could simply assign NULL to cly_syscon and let clk_* return 0
> directly. So the deferral should be handle when getting other clks like
> clk_ahb?
nope, I think the position itself is fine, so just do something like
if (IS_ERR(sdhci_arasan->clk_syscon)) {
{
if (PTR_ERR(sdhci_arasan->clk_syscon) == -EPROBE_DEFER)
return -EPROBE_DEFER;
else
sdhci_arasan->clk_syscon = NULL;
}
as the syscon clk would only ever be necessary if the soc-ctl-syscon is
actually defined. But there is no need to move that section I think.
next prev parent reply other threads:[~2016-08-29 9:10 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-29 8:02 [PATCH 0/4] Control clock for accessing syscon provided arasan IP Shawn Lin
2016-08-29 8:02 ` [PATCH 1/4] Documentation: mmc: sdhci-of-arasan: Add clk_syscon as an optional one Shawn Lin
[not found] ` <1472457779-7194-2-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-09-02 14:15 ` Rob Herring
2016-09-02 16:12 ` Doug Anderson
[not found] ` <CAD=FV=ViB8Fc579URi755ns+cKwuHC2orCqUSwh-fTpCi4TzqA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-09-02 17:14 ` Rob Herring
2016-08-29 8:02 ` [PATCH 2/4] mmc: sdhci-of-arasan: Control clock for accessing syscon Shawn Lin
[not found] ` <1472457779-7194-3-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-08-29 8:25 ` Heiko Stübner
2016-08-29 8:54 ` Shawn Lin
[not found] ` <fa7bea7d-b596-5784-4221-de3a8eaf5f17-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-08-29 9:10 ` Heiko Stübner [this message]
2016-08-29 9:20 ` Shawn Lin
2016-08-29 9:22 ` Shawn Lin
2016-08-29 10:46 ` Heiko Stübner
2016-08-29 8:02 ` [PATCH 3/4] arm64: dts: rockchip: add clk_syscon for sdhci on rk3399 Shawn Lin
2016-08-29 8:02 ` [PATCH 4/4] clk: rockchip: remove CLK_IGNORE_UNUSED flag for aclk_emmc_grf " Shawn Lin
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