[PATCH 1/3] dt-bindings: mfd: qcom,tcsr: Add compatible for sm8{2|3|5}50

[PATCH 1/3] dt-bindings: mfd: qcom,tcsr: Add compatible for sm8{2|3|5}50

[Mukesh Ojha]

Document the compatible for sm8{2|3|5}50 SoCs.

Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
---
 Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml
index 33c3d023a106..f328ddd6c566 100644
--- a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml
+++ b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml
@@ -29,7 +29,10 @@ properties:
           - qcom,sdx65-tcsr
           - qcom,sm4450-tcsr
           - qcom,sm8150-tcsr
+          - qcom,sm8250-tcsr
+          - qcom,sm8350-tcsr
           - qcom,sm8450-tcsr
+          - qcom,sm8550-tcsr
           - qcom,tcsr-apq8064
           - qcom,tcsr-apq8084
           - qcom,tcsr-ipq5332
-- 
2.7.4

[PATCH 2/3] arm64: dts: qcom: sm8{2|3}50: Add TCSR halt register space

[Mukesh Ojha]

Add TCSR register space and refer it from scm node, so that
it can be used by SCM driver.

Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sm8250.dtsi | 6 ++++++
 arch/arm64/boot/dts/qcom/sm8350.dtsi | 6 ++++++
 2 files changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index be970472f6c4..76f470a78608 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -671,6 +671,7 @@
 	firmware {
 		scm: scm {
 			compatible = "qcom,scm-sm8250", "qcom,scm";
+			qcom,dload-mode = <&tcsr 0x13000>;
 			#reset-cells = <1>;
 		};
 	};
@@ -2543,6 +2544,11 @@
 			#hwlock-cells = <1>;
 		};
 
+		tcsr: syscon@1fc0000 {
+			compatible = "qcom,sm8250-tcsr", "syscon";
+			reg = <0x0 0x1fc0000 0x0 0x30000>;
+		};
+
 		wsamacro: codec@3240000 {
 			compatible = "qcom,sm8250-lpass-wsa-macro";
 			reg = <0 0x03240000 0 0x1000>;
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index b46236235b7f..0a0d47d7dab1 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -289,6 +289,7 @@
 	firmware {
 		scm: scm {
 			compatible = "qcom,scm-sm8350", "qcom,scm";
+			qcom,dload-mode = <&tcsr 0x13000>;
 			#reset-cells = <1>;
 		};
 	};
@@ -1818,6 +1819,11 @@
 			#hwlock-cells = <1>;
 		};
 
+		tcsr: syscon@1fc0000 {
+			compatible = "qcom,sm8350-tcsr", "syscon";
+			reg = <0x0 0x1fc0000 0x0 0x30000>;
+		};
+
 		lpass_tlmm: pinctrl@33c0000 {
 			compatible = "qcom,sm8350-lpass-lpi-pinctrl";
 			reg = <0 0x033c0000 0 0x20000>,
-- 
2.7.4

[PATCH 3/3] arm64: dts: qcom: sm8550: Add download mode support

[Mukesh Ojha]

Refer TCSR phandle from scm node, so that it can be used by
SCM driver for setting download mode.

Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 7b9ddde0b2c9..2c65b40f6059 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -324,6 +324,7 @@
 	firmware {
 		scm: scm {
 			compatible = "qcom,scm-sm8550", "qcom,scm";
+			qcom,dload-mode = <&tcsr 0x13000>;
 			interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
 		};
 	};
-- 
2.7.4

Re: [PATCH 1/3] dt-bindings: mfd: qcom,tcsr: Add compatible for sm8{2|3|5}50

[Konrad Dybcio]

On 10/10/23 18:09, Mukesh Ojha wrote:
> Document the compatible for sm8{2|3|5}50 SoCs.
sm8[235]0 would work as well ;)

Konrad

Re: [PATCH 2/3] arm64: dts: qcom: sm8{2|3}50: Add TCSR halt register space

[Konrad Dybcio]

On 10/10/23 18:09, Mukesh Ojha wrote:
> Add TCSR register space and refer it from scm node, so that
> it can be used by SCM driver.
Yes we can see that's your changeset, please explain why you're doing 
this (the reboot mode registers).

> 
> Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
> ---
Not sure the regex in the subject is valid..

Besides, please split this into an independent change for each SoC.

Konrad

Re: [PATCH 3/3] arm64: dts: qcom: sm8550: Add download mode support

[Konrad Dybcio]

On 10/10/23 18:09, Mukesh Ojha wrote:
> Refer TCSR phandle from scm node, so that it can be used by
> SCM driver for setting download mode.
> 
> Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
> ---
Please improve the commit message, like in 2/3

Konrad

Re: [PATCH 1/3] dt-bindings: mfd: qcom,tcsr: Add compatible for sm8{2|3|5}50

[Neil Armstrong]

On 10/10/2023 18:09, Mukesh Ojha wrote:
> Document the compatible for sm8{2|3|5}50 SoCs.
> 
> Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
> ---
>   Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml | 3 +++
>   1 file changed, 3 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml
> index 33c3d023a106..f328ddd6c566 100644
> --- a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml
> +++ b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml
> @@ -29,7 +29,10 @@ properties:
>             - qcom,sdx65-tcsr
>             - qcom,sm4450-tcsr
>             - qcom,sm8150-tcsr
> +          - qcom,sm8250-tcsr
> +          - qcom,sm8350-tcsr
>             - qcom,sm8450-tcsr
> +          - qcom,sm8550-tcsr

This is already documented in:
Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml

>             - qcom,tcsr-apq8064
>             - qcom,tcsr-apq8084
>             - qcom,tcsr-ipq5332

Re: [PATCH 1/3] dt-bindings: mfd: qcom,tcsr: Add compatible for sm8{2|3|5}50

[Mukesh Ojha]

On 10/10/2023 11:23 PM, Neil Armstrong wrote:
> On 10/10/2023 18:09, Mukesh Ojha wrote:
>> Document the compatible for sm8{2|3|5}50 SoCs.
>>
>> Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
>> ---
>>   Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml | 3 +++
>>   1 file changed, 3 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml 
>> b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml
>> index 33c3d023a106..f328ddd6c566 100644
>> --- a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml
>> +++ b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml
>> @@ -29,7 +29,10 @@ properties:
>>             - qcom,sdx65-tcsr
>>             - qcom,sm4450-tcsr
>>             - qcom,sm8150-tcsr
>> +          - qcom,sm8250-tcsr
>> +          - qcom,sm8350-tcsr
>>             - qcom,sm8450-tcsr
>> +          - qcom,sm8550-tcsr
> 
> This is already documented in:
> Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml

Oh, will remove it from here.
Thanks.

-Mukesh
> 
>>             - qcom,tcsr-apq8064
>>             - qcom,tcsr-apq8084
>>             - qcom,tcsr-ipq5332
> 

Re: [PATCH 1/3] dt-bindings: mfd: qcom,tcsr: Add compatible for sm8{2|3|5}50

[Mukesh Ojha]

On 10/10/2023 10:07 PM, Konrad Dybcio wrote:
> 
> 
> On 10/10/23 18:09, Mukesh Ojha wrote:
>> Document the compatible for sm8{2|3|5}50 SoCs.
> sm8[235]0 would work as well ;)

Sure, Thanks.

-Mukesh
> 
> Konrad