[PATCH v2 1/4] dt-bindings: mfd: qcom,tcsr: Add compatible for sm8250/sm8350

[PATCH v2 1/4] dt-bindings: mfd: qcom,tcsr: Add compatible for sm8250/sm8350

[Mukesh Ojha]

Document the compatible for both sm8250 and sm8350 SoCs.

Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
---
Changes in v2:
 - Removed sm8550.
 - Removed regular expression from commit text/subject.

 Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml
index 33c3d023a106..798705ab6a46 100644
--- a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml
+++ b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml
@@ -29,6 +29,8 @@ properties:
           - qcom,sdx65-tcsr
           - qcom,sm4450-tcsr
           - qcom,sm8150-tcsr
+          - qcom,sm8250-tcsr
+          - qcom,sm8350-tcsr
           - qcom,sm8450-tcsr
           - qcom,tcsr-apq8064
           - qcom,tcsr-apq8084
-- 
2.7.4

[PATCH v2 2/4] arm64: dts: qcom: sm8250: Add TCSR halt register space

[Mukesh Ojha]

Enable download mode for sm8250 which can help collect
ramdump for this SoC.

Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
---
Changes in v2:
 - Improved commit text.

 arch/arm64/boot/dts/qcom/sm8250.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index be970472f6c4..76f470a78608 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -671,6 +671,7 @@
 	firmware {
 		scm: scm {
 			compatible = "qcom,scm-sm8250", "qcom,scm";
+			qcom,dload-mode = <&tcsr 0x13000>;
 			#reset-cells = <1>;
 		};
 	};
@@ -2543,6 +2544,11 @@
 			#hwlock-cells = <1>;
 		};
 
+		tcsr: syscon@1fc0000 {
+			compatible = "qcom,sm8250-tcsr", "syscon";
+			reg = <0x0 0x1fc0000 0x0 0x30000>;
+		};
+
 		wsamacro: codec@3240000 {
 			compatible = "qcom,sm8250-lpass-wsa-macro";
 			reg = <0 0x03240000 0 0x1000>;
-- 
2.7.4

Re: [PATCH v2 2/4] arm64: dts: qcom: sm8250: Add TCSR halt register space

[Dmitry Baryshkov]

On Wed, 25 Oct 2023 at 20:07, Mukesh Ojha <quic_mojha@quicinc.com> wrote:
>
> Enable download mode for sm8250 which can help collect
> ramdump for this SoC.
>
> Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
> ---
> Changes in v2:
>  - Improved commit text.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

>
>  arch/arm64/boot/dts/qcom/sm8250.dtsi | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index be970472f6c4..76f470a78608 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -671,6 +671,7 @@
>         firmware {
>                 scm: scm {
>                         compatible = "qcom,scm-sm8250", "qcom,scm";
> +                       qcom,dload-mode = <&tcsr 0x13000>;
>                         #reset-cells = <1>;
>                 };
>         };
> @@ -2543,6 +2544,11 @@
>                         #hwlock-cells = <1>;
>                 };
>
> +               tcsr: syscon@1fc0000 {
> +                       compatible = "qcom,sm8250-tcsr", "syscon";
> +                       reg = <0x0 0x1fc0000 0x0 0x30000>;
> +               };
> +
>                 wsamacro: codec@3240000 {
>                         compatible = "qcom,sm8250-lpass-wsa-macro";
>                         reg = <0 0x03240000 0 0x1000>;
> --
> 2.7.4
>


-- 
With best wishes
Dmitry

[PATCH v2 3/4] arm64: dts: qcom: sm8350: Add TCSR halt register space

[Mukesh Ojha]

Enable download mode for sm8350 which can help collect
ramdump for this SoC.

Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
---
Changes in v2:
 - Improved commit text.

 arch/arm64/boot/dts/qcom/sm8350.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index b46236235b7f..0a0d47d7dab1 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -289,6 +289,7 @@
 	firmware {
 		scm: scm {
 			compatible = "qcom,scm-sm8350", "qcom,scm";
+			qcom,dload-mode = <&tcsr 0x13000>;
 			#reset-cells = <1>;
 		};
 	};
@@ -1818,6 +1819,11 @@
 			#hwlock-cells = <1>;
 		};
 
+		tcsr: syscon@1fc0000 {
+			compatible = "qcom,sm8350-tcsr", "syscon";
+			reg = <0x0 0x1fc0000 0x0 0x30000>;
+		};
+
 		lpass_tlmm: pinctrl@33c0000 {
 			compatible = "qcom,sm8350-lpass-lpi-pinctrl";
 			reg = <0 0x033c0000 0 0x20000>,
-- 
2.7.4

Re: [PATCH v2 3/4] arm64: dts: qcom: sm8350: Add TCSR halt register space

[Dmitry Baryshkov]

On Wed, 25 Oct 2023 at 20:07, Mukesh Ojha <quic_mojha@quicinc.com> wrote:
>
> Enable download mode for sm8350 which can help collect
> ramdump for this SoC.
>
> Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
> ---
> Changes in v2:
>  - Improved commit text.
>
>  arch/arm64/boot/dts/qcom/sm8350.dtsi | 6 ++++++
>  1 file changed, 6 insertions(+)

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

-- 
With best wishes
Dmitry

[PATCH v2 4/4] arm64: dts: qcom: sm8550: Enable download mode register write

[Mukesh Ojha]

Enable download mode setting for sm8550 which can help collect
ramdump for this SoC.

Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
---
Changes in v2:
 - Improved commit text.

 arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 7bafb3d88d69..c94d06a9290c 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -324,6 +324,7 @@
 	firmware {
 		scm: scm {
 			compatible = "qcom,scm-sm8550", "qcom,scm";
+			qcom,dload-mode = <&tcsr 0x13000>;
 			interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
 		};
 	};
-- 
2.7.4

Re: [PATCH v2 4/4] arm64: dts: qcom: sm8550: Enable download mode register write

[Mukesh Ojha]

On 10/25/2023 10:36 PM, Mukesh Ojha wrote:
> Enable download mode setting for sm8550 which can help collect
> ramdump for this SoC.
> 
> Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
> ---
> Changes in v2:
>   - Improved commit text.
> 
>   arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> index 7bafb3d88d69..c94d06a9290c 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> @@ -324,6 +324,7 @@
>   	firmware {
>   		scm: scm {
>   			compatible = "qcom,scm-sm8550", "qcom,scm";
> +			qcom,dload-mode = <&tcsr 0x13000>;

Sorry for this but made a mistake here for sm8550.

it should be

qcom,dload-mode = <&tcsr 0x19000>;

will send a v3 for this patch.

-Mukesh

>   			interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
>   		};
>   	};

Re: [PATCH v2 1/4] dt-bindings: mfd: qcom,tcsr: Add compatible for sm8250/sm8350

[Krzysztof Kozlowski]

On 25/10/2023 19:06, Mukesh Ojha wrote:
> Document the compatible for both sm8250 and sm8350 SoCs.
> 
> Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
> ---

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

Re: (subset) [PATCH v2 1/4] dt-bindings: mfd: qcom,tcsr: Add compatible for sm8250/sm8350

[Lee Jones]

On Wed, 25 Oct 2023 22:36:38 +0530, Mukesh Ojha wrote:
> Document the compatible for both sm8250 and sm8350 SoCs.
> 
> 

Applied, thanks!

[1/4] dt-bindings: mfd: qcom,tcsr: Add compatible for sm8250/sm8350
      commit: a88f80580a1a076e69c4fecdf6d6441fac24e8c1

--
Lee Jones [李琼斯]

Re: (subset) [PATCH v2 1/4] dt-bindings: mfd: qcom,tcsr: Add compatible for sm8250/sm8350

[Bjorn Andersson]

On Wed, 25 Oct 2023 22:36:38 +0530, Mukesh Ojha wrote:
> Document the compatible for both sm8250 and sm8350 SoCs.
> 
> 

Applied, thanks!

[2/4] arm64: dts: qcom: sm8250: Add TCSR halt register space
      commit: d59653233e8779e3fe082eb5635b9785f2095af6
[3/4] arm64: dts: qcom: sm8350: Add TCSR halt register space
      commit: 1accc6031d925c6045c4776d5f3646996b0b242a
[4/4] arm64: dts: qcom: sm8550: Enable download mode register write
      commit: 44b1f64cad5703c87918cc9ffbf9b79bb959418d

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>

Re: (subset) [PATCH v2 1/4] dt-bindings: mfd: qcom,tcsr: Add compatible for sm8250/sm8350

[Mukesh Ojha]

Hi Bjorn,

I have said in one of the thread here,

https://lore.kernel.org/lkml/57eed7c3-e884-a28b-a1ff-e5aecbb11137@quicinc.com/

There is a wrong register offset given for sm8550 in 4/4.
Since, you applied the changes in your tree, shall i send
the separate patch for it, or would you mind fixing it ?

-Mukesh

On 12/8/2023 8:27 AM, Bjorn Andersson wrote:
> 
> On Wed, 25 Oct 2023 22:36:38 +0530, Mukesh Ojha wrote:
>> Document the compatible for both sm8250 and sm8350 SoCs.
>>
>>
> 
> Applied, thanks!
> 
> [2/4] arm64: dts: qcom: sm8250: Add TCSR halt register space
>        commit: d59653233e8779e3fe082eb5635b9785f2095af6
> [3/4] arm64: dts: qcom: sm8350: Add TCSR halt register space
>        commit: 1accc6031d925c6045c4776d5f3646996b0b242a
> [4/4] arm64: dts: qcom: sm8550: Enable download mode register write
>        commit: 44b1f64cad5703c87918cc9ffbf9b79bb959418d
> 
> Best regards,

Re: (subset) [PATCH v2 1/4] dt-bindings: mfd: qcom,tcsr: Add compatible for sm8250/sm8350

[Mukesh Ojha]

On 12/11/2023 1:36 PM, Mukesh Ojha wrote:
> Hi Bjorn,
> 
> I have said in one of the thread here,
> 
> https://lore.kernel.org/lkml/57eed7c3-e884-a28b-a1ff-e5aecbb11137@quicinc.com/
> 
> There is a wrong register offset given for sm8550 in 4/4.
> Since, you applied the changes in your tree, shall i send
> the separate patch for it, or would you mind fixing it ?

Please ignore my mail, I saw you made the correction.
Thanks.

https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=44b1f64cad5703c87918cc9ffbf9b79bb959418d

-Mukesh

> 
> -Mukesh
> 
> On 12/8/2023 8:27 AM, Bjorn Andersson wrote:
>>
>> On Wed, 25 Oct 2023 22:36:38 +0530, Mukesh Ojha wrote:
>>> Document the compatible for both sm8250 and sm8350 SoCs.
>>>
>>>
>>
>> Applied, thanks!
>>
>> [2/4] arm64: dts: qcom: sm8250: Add TCSR halt register space
>>        commit: d59653233e8779e3fe082eb5635b9785f2095af6
>> [3/4] arm64: dts: qcom: sm8350: Add TCSR halt register space
>>        commit: 1accc6031d925c6045c4776d5f3646996b0b242a
>> [4/4] arm64: dts: qcom: sm8550: Enable download mode register write
>>        commit: 44b1f64cad5703c87918cc9ffbf9b79bb959418d
>>
>> Best regards,