From: Mrinmay Sarkar <quic_msarkar@quicinc.com>
To: agross@kernel.org, andersson@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
konrad.dybcio@linaro.org, mani@kernel.org
Cc: quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com,
quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com,
dmitry.baryshkov@linaro.org, robh@kernel.org,
quic_krichai@quicinc.com, quic_vbadigan@quicinc.com,
quic_parass@quicinc.com, quic_schintav@quicinc.com,
quic_shijose@quicinc.com,
"Mrinmay Sarkar" <quic_msarkar@quicinc.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
mhi@lists.linux.dev
Subject: [PATCH v5 0/4] arm64: qcom: sa8775p: add cache coherency support for SA8775P
Date: Tue, 31 Oct 2023 10:11:02 +0530 [thread overview]
Message-ID: <1698727267-22131-1-git-send-email-quic_msarkar@quicinc.com> (raw)
This series is to enable cache snooping logic in both RC and EP
driver and add the "dma-coherent" property in dtsi to support
cache coherency in SA8775P.
This series adds the relavent DT bindings, new compatible string,
add support to EPF driver and add EP PCIe node in dtsi file for
ep pcie0 controller.
v4 -> v5:
- add maxItems to the respective field to constrain io space and
interrupt in all variants.
v3 -> v4:
- add maxItems field in dt bindings
- update comment in patch2
- dropped PHY driver patch as it is already applied [1]
- update comment in EPF driver patch
- update commect in dtsi and add iommus instead of iommu-map
[1] https://lore.kernel.org/all/169804254205.383714.18423881810869732517.b4-ty@kernel.org/
v2 -> v3:
- removed if/then schemas, added minItems for reg,
reg-bnames, interrupt and interrupt-names instead.
- adding qcom,sa8775p-pcie-ep compitable for sa8775p
as we have some specific change to add.
- reusing sm8450's pcs_misc num table as it is same as sa8775p.
used appropriate namespace for pcs.
- remove const from sa8775p_header as kernel test robot
throwing some warnings due to this.
- remove fallback compatiable as we are adding compatiable for sa8775p.
v1 -> v2:
- update description for dma
- Reusing qcom,sdx55-pcie-ep compatibe so remove compaitable
for sa8775p
- sort the defines in phy header file and remove extra defines
- add const in return type pci_epf_header and remove MHI_EPF_USE_DMA
flag as hdma patch is not ready
- add fallback compatiable as qcom,sdx55-pcie-ep, add iommu property
Mrinmay Sarkar (4):
dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC
PCI: qcom-ep: Add support for SA8775P SOC
PCI: epf-mhi: Add support for SA8775P
arm64: dts: qcom: sa8775p: Add ep pcie0 controller node
.../devicetree/bindings/pci/qcom,pcie-ep.yaml | 64 +++++++++++++++++++++-
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 46 ++++++++++++++++
drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 +
drivers/pci/endpoint/functions/pci-epf-mhi.c | 17 ++++++
4 files changed, 126 insertions(+), 2 deletions(-)
--
2.7.4
next reply other threads:[~2023-10-31 4:41 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-31 4:41 Mrinmay Sarkar [this message]
2023-10-31 4:41 ` [PATCH v5 1/4] dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC Mrinmay Sarkar
2023-10-31 4:41 ` [PATCH v5 2/4] PCI: qcom-ep: Add support for SA8775P SOC Mrinmay Sarkar
2023-10-31 4:41 ` [PATCH v5 3/4] PCI: epf-mhi: Add support for SA8775P Mrinmay Sarkar
2023-10-31 4:41 ` [PATCH v5 4/4] arm64: dts: qcom: sa8775p: Add ep pcie0 controller node Mrinmay Sarkar
2023-10-31 4:57 ` [PATCH v5 0/4] arm64: qcom: sa8775p: add cache coherency support for SA8775P Manivannan Sadhasivam
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1698727267-22131-1-git-send-email-quic_msarkar@quicinc.com \
--to=quic_msarkar@quicinc.com \
--cc=agross@kernel.org \
--cc=andersson@kernel.org \
--cc=bhelgaas@google.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dmitry.baryshkov@linaro.org \
--cc=kishon@kernel.org \
--cc=konrad.dybcio@linaro.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=kw@linux.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=mani@kernel.org \
--cc=mhi@lists.linux.dev \
--cc=quic_krichai@quicinc.com \
--cc=quic_nayiluri@quicinc.com \
--cc=quic_nitegupt@quicinc.com \
--cc=quic_parass@quicinc.com \
--cc=quic_ramkri@quicinc.com \
--cc=quic_schintav@quicinc.com \
--cc=quic_shazhuss@quicinc.com \
--cc=quic_shijose@quicinc.com \
--cc=quic_vbadigan@quicinc.com \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox