From: patchwork-bot+linux-riscv@kernel.org
To: Anup Patel <apatel@ventanamicro.com>
Cc: linux-riscv@lists.infradead.org, pbonzini@redhat.com,
atishp@atishpatra.org, palmer@dabbelt.com,
paul.walmsley@sifive.com, conor@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, shuah@kernel.org,
ajones@ventanamicro.com, mchitale@ventanamicro.com,
devicetree@vger.kernel.org, kvm@vger.kernel.org,
kvm-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-kselftest@vger.kernel.org
Subject: Re: [PATCH v3 0/6] KVM RISC-V Conditional Operations
Date: Sun, 12 Nov 2023 00:55:46 +0000 [thread overview]
Message-ID: <169975054631.11360.10958982747975281844.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <20231003035226.1945725-1-apatel@ventanamicro.com>
Hello:
This series was applied to riscv/linux.git (fixes)
by Anup Patel <anup@brainfault.org>:
On Tue, 3 Oct 2023 09:22:20 +0530 you wrote:
> This series extends KVM RISC-V to allow Guest/VM discover and use
> conditional operations related ISA extensions (namely XVentanaCondOps
> and Zicond).
>
> To try these patches, use KVMTOOL from riscv_zbx_zicntr_smstateen_condops_v1
> branch at: https://github.com/avpatel/kvmtool.git
>
> [...]
Here is the summary with links:
- [v3,1/6] dt-bindings: riscv: Add Zicond extension entry
https://git.kernel.org/riscv/c/00c6f39c8247
- [v3,2/6] RISC-V: Detect Zicond from ISA string
https://git.kernel.org/riscv/c/662a601aa355
- [v3,3/6] RISC-V: KVM: Allow Zicond extension for Guest/VM
https://git.kernel.org/riscv/c/df68f4d8cb49
- [v3,4/6] KVM: riscv: selftests: Add senvcfg register to get-reg-list test
https://git.kernel.org/riscv/c/4d554e0226e6
- [v3,5/6] KVM: riscv: selftests: Add smstateen registers to get-reg-list test
https://git.kernel.org/riscv/c/e1a8db0c9a0e
- [v3,6/6] KVM: riscv: selftests: Add condops extensions to get-reg-list test
https://git.kernel.org/riscv/c/2b3f2b78ec93
You are awesome, thank you!
--
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prev parent reply other threads:[~2023-11-12 0:55 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-03 3:52 [PATCH v3 0/6] KVM RISC-V Conditional Operations Anup Patel
2023-10-03 3:52 ` [PATCH v3 1/6] dt-bindings: riscv: Add Zicond extension entry Anup Patel
2023-10-03 3:52 ` [PATCH v3 2/6] RISC-V: Detect Zicond from ISA string Anup Patel
2023-10-04 14:07 ` Palmer Dabbelt
2023-10-05 5:50 ` Anup Patel
2023-10-03 3:52 ` [PATCH v3 3/6] RISC-V: KVM: Allow Zicond extension for Guest/VM Anup Patel
2023-10-03 3:52 ` [PATCH v3 4/6] KVM: riscv: selftests: Add senvcfg register to get-reg-list test Anup Patel
2023-10-03 3:52 ` [PATCH v3 5/6] KVM: riscv: selftests: Add smstateen registers " Anup Patel
2023-10-03 3:52 ` [PATCH v3 6/6] KVM: riscv: selftests: Add condops extensions " Anup Patel
2023-10-05 6:05 ` [PATCH v3 0/6] KVM RISC-V Conditional Operations Anup Patel
2023-10-12 14:04 ` Anup Patel
2023-11-12 0:55 ` patchwork-bot+linux-riscv [this message]
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