From: William Qiu <william.qiu@starfivetech.com>
To: Conor Dooley <conor@kernel.org>
Cc: <devicetree@vger.kernel.org>, <linux-spi@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
"Emil Renner Berthing" <kernel@esmil.dk>,
Ziv Xu <ziv.xu@starfivetech.com>
Subject: Re: [PATCH v4 2/3] spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI
Date: Wed, 5 Jul 2023 15:02:08 +0800 [thread overview]
Message-ID: <16e71854-cfd9-b93b-6221-864a56a50678@starfivetech.com> (raw)
In-Reply-To: <20230704-gooey-lair-2bc45bbd163c@spud>
On 2023/7/5 0:36, Conor Dooley wrote:
> Hey William,
>
> On Tue, Jul 04, 2023 at 05:04:52PM +0800, William Qiu wrote:
>> Add QSPI clock operation in device probe.
>>
>> Signed-off-by: William Qiu <william.qiu@starfivetech.com>
>> Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
>> Reported-by: kernel test robot <lkp@intel.com>
>> Closes: https://lore.kernel.org/oe-kbuild-all/202306022017.UbwjjWRN-lkp@intel.com/
>
> These Reported-by tags don't seem correct, given they were reports about
> this patch, not the reason for it - but did you actually check that you
> fixed the errors that the patch produces?
>
> This particular one seems to complain about a hunk that is still in the
> patch & the CI running on the RISC-V patchwork is complaining about it.
>
> Cheers,
> Conor.
>
I checked and found that I had only partially fixed it. I'll fix it in next
version.
Thanks for your comments.
Best regards,
William
>> @@ -1840,6 +1858,8 @@ static int cqspi_resume(struct device *dev)
>> struct spi_master *master = dev_get_drvdata(dev);
>>
>> clk_prepare_enable(cqspi->clk);
>> + if (of_device_is_compatible(dev->of_node, "starfive,jh7110-qspi"))
>> + clk_bulk_prepare_enable(cqspi->num_clks, cqspi->clks);
>> cqspi_wait_idle(cqspi);
>> cqspi_controller_init(cqspi);
>>
>> --
>> 2.34.1
>>
next prev parent reply other threads:[~2023-07-05 7:02 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-04 9:04 [PATCH v4 0/3] Add initialization of clock for StarFive JH7110 SoC William Qiu
2023-07-04 9:04 ` [PATCH v4 1/3] dt-bindings: qspi: cdns,qspi-nor: Add clocks " William Qiu
2023-07-04 9:04 ` [PATCH v4 2/3] spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI William Qiu
2023-07-04 16:36 ` Conor Dooley
2023-07-04 16:41 ` Mark Brown
2023-07-05 7:02 ` William Qiu [this message]
2023-07-05 6:21 ` Krzysztof Kozlowski
2023-07-05 7:04 ` William Qiu
2023-07-05 7:23 ` Krzysztof Kozlowski
2023-07-05 8:31 ` William Qiu
2023-07-04 9:04 ` [PATCH v4 3/3] riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoC William Qiu
2023-07-04 9:43 ` Krzysztof Kozlowski
2023-07-05 7:05 ` William Qiu
2023-07-17 17:13 ` Aurelien Jarno
2023-07-18 6:12 ` William Qiu
2023-08-04 19:04 ` (subset) [PATCH v4 0/3] Add initialization of clock " Mark Brown
-- strict thread matches above, loose matches on Subject: below --
2023-07-04 9:19 [PATCH v1 0/2] Add SPI module " William Qiu
2023-07-04 9:19 ` [PATCH v4 2/3] spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI William Qiu
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