From: Mrinmay Sarkar <quic_msarkar@quicinc.com>
To: agross@kernel.org, andersson@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
konrad.dybcio@linaro.org, mani@kernel.org, robh+dt@kernel.org
Cc: quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com,
quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com,
dmitry.baryshkov@linaro.org, robh@kernel.org,
quic_krichai@quicinc.com, quic_vbadigan@quicinc.com,
quic_parass@quicinc.com, quic_schintav@quicinc.com,
quic_shijjose@quicinc.com,
"Mrinmay Sarkar" <quic_msarkar@quicinc.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
mhi@lists.linux.dev
Subject: [PATCH v9 4/5] PCI: epf-mhi: Add support for SA8775P
Date: Fri, 1 Dec 2023 17:36:15 +0530 [thread overview]
Message-ID: <1701432377-16899-5-git-send-email-quic_msarkar@quicinc.com> (raw)
In-Reply-To: <1701432377-16899-1-git-send-email-quic_msarkar@quicinc.com>
Add support for Qualcomm Snapdragon SA8775P SoC to the EPF driver.
SA8775P is currently reusing the PID 0x0306 (the default one hardcoded
in the config space header) as the unique PID is not yet allocated.
But the host side stack works fine with the default PID. It will get
updated once the PID is finalized. Currently, it has no fixed PCI class,
so it is being advertised as "PCI_CLASS_OTHERS".
Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/pci/endpoint/functions/pci-epf-mhi.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c
index 5b0515a..68801c2 100644
--- a/drivers/pci/endpoint/functions/pci-epf-mhi.c
+++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c
@@ -114,6 +114,22 @@ static const struct pci_epf_mhi_ep_info sm8450_info = {
.flags = MHI_EPF_USE_DMA,
};
+static struct pci_epf_header sa8775p_header = {
+ .vendorid = PCI_VENDOR_ID_QCOM,
+ .deviceid = 0x0306, /* FIXME: Update deviceid for sa8775p EP */
+ .baseclass_code = PCI_CLASS_OTHERS,
+ .interrupt_pin = PCI_INTERRUPT_INTA,
+};
+
+static const struct pci_epf_mhi_ep_info sa8775p_info = {
+ .config = &mhi_v1_config,
+ .epf_header = &sa8775p_header,
+ .bar_num = BAR_0,
+ .epf_flags = PCI_BASE_ADDRESS_MEM_TYPE_32,
+ .msi_count = 32,
+ .mru = 0x8000,
+};
+
struct pci_epf_mhi {
const struct pci_epc_features *epc_features;
const struct pci_epf_mhi_ep_info *info;
@@ -677,6 +693,7 @@ static int pci_epf_mhi_probe(struct pci_epf *epf,
}
static const struct pci_epf_device_id pci_epf_mhi_ids[] = {
+ { .name = "pci_epf_mhi_sa8775p", .driver_data = (kernel_ulong_t)&sa8775p_info },
{ .name = "pci_epf_mhi_sdx55", .driver_data = (kernel_ulong_t)&sdx55_info },
{ .name = "pci_epf_mhi_sm8450", .driver_data = (kernel_ulong_t)&sm8450_info },
{},
--
2.7.4
next prev parent reply other threads:[~2023-12-01 12:06 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-01 12:06 [PATCH v9 0/5] arm64: qcom: sa8775p: add support for EP PCIe Mrinmay Sarkar
2023-12-01 12:06 ` [PATCH v9 1/5] dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC Mrinmay Sarkar
2023-12-01 12:06 ` [PATCH v9 2/5] PCI: qcom-ep: Add support for SA8775P SOC Mrinmay Sarkar
2023-12-01 12:06 ` [PATCH v9 3/5] PCI: epf-mhi: Add "pci_epf_mhi_" prefix to the function names Mrinmay Sarkar
2023-12-01 12:06 ` Mrinmay Sarkar [this message]
2023-12-01 12:06 ` [PATCH v9 5/5] arm64: dts: qcom: sa8775p: Add ep pcie0 controller node Mrinmay Sarkar
2024-01-28 2:58 ` [PATCH v9 0/5] arm64: qcom: sa8775p: add support for EP PCIe Bjorn Andersson
2024-01-29 12:39 ` Manivannan Sadhasivam
2024-02-16 10:52 ` Manivannan Sadhasivam
2024-03-06 13:35 ` Mrinmay Sarkar
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