From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: "Niklas Söderlund" <niso@kth.se>
Cc: linux-kernel@vger.kernel.org, linus.walleij@linaro.org,
devicetree@vger.kernel.org, linux-sh@vger.kernel.org,
magnus.damm@gmail.com
Subject: Re: [PATCH 3/4] ARM: shmobile: emev2: Add PFC information to emev2.dtsi
Date: Tue, 13 Jan 2015 16:45:59 +0200 [thread overview]
Message-ID: <1701639.rHDfQqXMRy@avalon> (raw)
In-Reply-To: <1418414497-23741-4-git-send-email-niso@kth.se>
Hi Niklas,
Thank you for the patch.
On Friday 12 December 2014 21:01:36 Niklas Söderlund wrote:
> With this information all GPIOs can make use of the PFC functionality.
>
> Signed-off-by: Niklas Söderlund <niso@kth.se>
> ---
> arch/arm/boot/dts/emev2.dtsi | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi
> index cc7bfe0..518b7fa 100644
> --- a/arch/arm/boot/dts/emev2.dtsi
> +++ b/arch/arm/boot/dts/emev2.dtsi
> @@ -169,12 +169,19 @@
> clock-names = "sclk";
> };
>
> + pfc: pfc@e0140200 {
> + compatible = "renesas,pfc-emev2";
> + reg = <0xe0140200 0x14>, <0xe0140284 0xc>,
> + <0xe0140294 0x8>, <0xe01402a8 0x4>;
I think a single reg entry set to <0xe0140200 0x100> should be enough.
> + };
> +
> gpio0: gpio@e0050000 {
> compatible = "renesas,em-gio";
> reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
> interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>,
> <0 68 IRQ_TYPE_LEVEL_HIGH>;
> gpio-controller;
> + gpio-ranges = <&pfc 0 0 32>;
> #gpio-cells = <2>;
> ngpios = <32>;
> interrupt-controller;
> @@ -186,6 +193,7 @@
> interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>,
> <0 70 IRQ_TYPE_LEVEL_HIGH>;
> gpio-controller;
> + gpio-ranges = <&pfc 0 32 32>;
> #gpio-cells = <2>;
> ngpios = <32>;
> interrupt-controller;
> @@ -197,6 +205,7 @@
> interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>,
> <0 72 IRQ_TYPE_LEVEL_HIGH>;
> gpio-controller;
> + gpio-ranges = <&pfc 0 64 32>;
> #gpio-cells = <2>;
> ngpios = <32>;
> interrupt-controller;
> @@ -208,6 +217,7 @@
> interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>,
> <0 74 IRQ_TYPE_LEVEL_HIGH>;
> gpio-controller;
> + gpio-ranges = <&pfc 0 96 32>;
> #gpio-cells = <2>;
> ngpios = <32>;
> interrupt-controller;
> @@ -219,6 +229,7 @@
> interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>,
> <0 76 IRQ_TYPE_LEVEL_HIGH>;
> gpio-controller;
> + gpio-ranges = <&pfc 0 128 32>;
Shouldn't this be <&pfc 0 128 31>; ?
> #gpio-cells = <2>;
> ngpios = <31>;
> interrupt-controller;
--
Regards,
Laurent Pinchart
next prev parent reply other threads:[~2015-01-13 14:45 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-12 20:01 [PATCH 0/4] sh-pfc: Add emev2 pinmux support Niklas Söderlund
2014-12-12 20:01 ` [PATCH 2/4] " Niklas Söderlund
2015-01-13 14:27 ` Laurent Pinchart
2015-01-17 18:11 ` Niklas Söderlund
2014-12-12 20:01 ` [PATCH 3/4] ARM: shmobile: emev2: Add PFC information to emev2.dtsi Niklas Söderlund
2015-01-13 14:45 ` Laurent Pinchart [this message]
2014-12-12 20:01 ` [PATCH 4/4] ARM: shmobile: emev2-kzm9d: Add PFC information for uart1 Niklas Söderlund
[not found] ` <1418414497-23741-1-git-send-email-niso-UNjuZkX4dYU@public.gmane.org>
2014-12-12 20:01 ` [PATCH 1/4] sh-pfc: add macro to define pinmux without function Niklas Söderlund
2015-01-09 10:22 ` [PATCH 0/4] sh-pfc: Add emev2 pinmux support Niklas Söderlund
2015-01-13 6:23 ` Linus Walleij
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